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VS6724 bảng dữ liệu(PDF) 12 Page - STMicroelectronics |
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VS6724 bảng dữ liệu(HTML) 12 Page - STMicroelectronics |
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12 / 118 page ![]() Functional description VS6724 12/118 2.3 Sensor array The VS6724 physical pixel array is 1616 x 1216 pixels (see Figure 3), with a pixel size of 2.2 µm by 2.2 µm. The image size read from the array is mode dependent. For UXGA mode the image size read from the array is 1608x1208. For SVGA mode it is 1616x1208. Figure 3. Sensor array 2.3.1 Sensor mode control The VS6724 can operate it’s sensor array in two modes controlled by register SensorMode within Mode setup. ● SensorMode_UXGA - the full array can be read out at 30 fps and the VS6724 can achieve: – 30 fps JPEGs up to UXGA – 30 fps YCbCr or RGB up to SVGA – 15 fps YCbCr or RGB over SVGA ● SensorMode_SVGA_analogue binning - this is a reduced power mode which uses the full array and a technique of analogue binning output SVGA at up to 30 fps. 2.3.2 Horizontal mirror and vertical flip The image data output from the VS6724 can be mirrored horizontally or flipped vertically (or both). 4 Dummy Rows 4 Border Rows Visible array 1600 x 1200 pixels 1600 pixels 1608 pixels 1616 pixels 4 Dummy Rows 4 Border Rows (1608x1208 including borders) |
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