UPD77533 datasheet(16/104 Pages) RENESAS

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Data Sheet S15671EJ4V0DS

µµµµPD77533

2.2

Host Serial Commands

2.2.1 Command format

The format of the serial commands used for communication between the

µPD77533 and the host CPU is shown

below. For details of the command ID (CMD-ID), data structure, etc., see 12 PACKET AND COMMAND FORMAT.

Figure 2-1. Command Format

2.2.2

Asynchronous serial

The asynchronous serial specifications are shown below.

Table 2-2. Asynchronous Serial Specifications

Baud rate

2400, 4800, 9600 (initial value), 19200, 38400, 57600, 115200 bps supported

Start bit

1 bit

Stop bit

1 bit

Data length

8 bits

Parity

None

Flow control

RTS (1: Stop transmission, 0: Request transmission)

CTS (1: Stop transmission, 0: Request transmission)

RESET

3.1

Reset (Hardware Reset via RESETB Pin)

The hardware of the

µPD77533 is initialized by a reset via the RESETB pin.

Caution A hardware reset must be applied at the RESETB pin and a clock input to the GPSCLK pin when

the power is turned on.

Figure 3-1. Hardware Reset

8 bits

CMD-ID

FLAG

LENGTH

DATA

8 bits

03H

0 to 255 bytes

PD77533

Host CPU

Internal parameter

setting values initialized,

external pins initialized

Reset (0x04)

Power applied,

hardware reset released

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