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UPD77533 bảng dữ liệu(PDF) 34 Page - Renesas Technology Corp |
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UPD77533 bảng dữ liệu(HTML) 34 Page - Renesas Technology Corp |
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34 / 104 page ![]() Data Sheet S15671EJ4V0DS 32 µµµµPD77533 7. SHIFTING TO AND RESTORING FROM POWER SAVE MODE The µPD77533 has two power save modes: STOP and HALT. The µPD77533 is shifted from normal mode (RUN) to STOP or HALT mode via the Power Control command (CMD-ID: 0x03) or Sleep Timer command (CMD-ID: 0x12). The status is shifted back to the normal mode from the STOP or HALT mode when the WKUPB pin input is 0, or, in the case of the HALT mode, by the reception of any command. An outline of the status transition to and from the power save modes is shown in Figure 7-1. The HALT and STOP modes differ as follows. [HALT] • The PLL circuit in the µPD77533 is not stopped, allowing fast transition back to normal mode. • Transition back to normal mode (RUN) occurs when the WKUPB pin input is 0 or by the reception of any command. [STOP] • The PLL circuit in the µPD77533 is stopped, reducing the power consumption to 700 µA (MAX.). • Transition back to normal mode (RUN) occurs when the WKUPB pin input is 0. Figure 7-1. Shifting to and Restoring from Power Save Mode STOP RUN HALT Power Control (shift to HALT) or Sleep Timer (shift to HALT) Power Control (shift to STOP) or Sleep Timer (shift to STOP) WKUPB pin input = 0 or any command received WKUPB pin input = 0 |
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