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HC05RC17GRS/D bảng dữ liệu(PDF) 117 Page - NXP Semiconductors

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Electrical Specifications
Control Timing (3.3 Vdc and 5.0 Vdc)
MC68HC05RC17 — Rev. 2.0
General Release Specification
Electrical Specifications
12.9 Control Timing (3.3 Vdc and 5.0 Vdc)
Characteristic
Symbol
Min
Max
Unit
Frequency of Operation
Assumes use of 32.768-kHz Crystal Only
fOSC
32.768
32.768
kHz
Internal Operating Frequency
Assumes use of 32.768-kHz Crystal Only
fOP = fOSC ÷ 2 if PLL is NOT Driving Internal Bus
fOP = 32.768 kHz x N, where N = 16, 32, or 64 (Selectable)
and PLL is Driving Internal Bus
fOP
—
0.524
16.384
2.097
kHz
MHz
Cycle Time
Assumes fOP = 2.097 MHz
tCYC
480
—
ns
Crystal Oscillator Startup Time
Assumes fOP = 2.097 MHz)
tOXOV
—
100
ms
Stop Recovery Startup Time (Crystal Oscillator)
Assumes fOP = 2.097 MHz)
tILCH
—
100
ms
RESET Pulse Width
Assumes fOP = 2.097 MHz)
tRL
1.5
—
tCYC
Interrupt Pulse Width Low (Edge-Triggered)
Assumes fOP = 2.097 MHz)
tILIH
125
—
ns
Interrupt Pulse Period
Assumes fOP = 2.097 MHz)
tILIL
Note 2
—
tCYC
OSC1 Pulse Width
tOH, tOL
90
—
ns
NOTES:
1. VDD = 3.0 to 5.5 Vdc ± 10%, VSS = 0 Vdc, TA = 0 °C to +70 °C, unless otherwise noted
2. The minimum period, tILIL, should not be less than the number of cycle times it takes to execute the interrupt service
routine plus 2T tCYC.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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