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HC05RC17GRS/D bảng dữ liệu(PDF) 71 Page - NXP Semiconductors

tên linh kiện HC05RC17GRS/D
Giải thích chi tiết về linh kiện  General Release Specification
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Carrier Modulator Transmitter (CMT)
Overview
MC68HC05RC17 — Rev. 2.0
General Release Specification
Carrier Modulator Transmitter (CMT)
Figure 9-1. Carrier Modulator Transmitter Module Block Diagram
modulator output (TIME), control the logic level of the modulator output
(baseband) or directly route the carrier to the modulator output while
providing a signal to switch the carrier generator between high/low time
register buffers (FSK). See 9.5 Modulator.
The transmitter output block controls the state of the infrared out pin
(IRO). The modulator output is gated on to the IRO pin when the
modulator/carrier generator is enabled. Otherwise, the IRO pin is
controlled by the state of the IRO latch, which is directly accessible to the
CPU by means of bit 7 of the carrier generator data registers CHR1 and
CLR1. The IRO latch can be written to on either edge of the internal bus
clock (fosc/2), allowing for IR waveforms which have a resolution of twice
the bus clock frequency (fosc). See 9.4.2 Carrier Generator Data
Registers
.
fOSC
CARRIER
GENERATOR
MODULATOR
CARRIER
OUT
MODULATOR
OUT
MODULATOR/
TRANSMITTER
OUTPUT
BASE
MODE
PRIMARY/SECONDARY SELECT
CPU INTERFACE
IRO
PIN
fOSC ÷ 2
DB
AB
EOC INTERRUPT
.
CARRIER
ENABLE
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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