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HC05RC17GRS/D bảng dữ liệu(PDF) 55 Page - NXP Semiconductors |
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HC05RC17GRS/D bảng dữ liệu(HTML) 55 Page - NXP Semiconductors |
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55 / 128 page ![]() MC68HC05RC17 — Rev. 2.0 General Release Specification Low-Power Modes General Release Specification — MC68HC05RC17 Section 6. Low-Power Modes 6.1 Contents 6.2 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 6.3 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 6.4 Wait Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 6.5 Low-Power Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 6.2 Introduction This section describes the low-power modes. 6.3 Stop Mode The STOP instruction places the MCU in its lowest power-consumption mode. In stop mode, the internal oscillator is turned off, halting all internal processing, including timer operation. During the stop mode, the CTCSR ($08) bits are altered to remove any pending timer interrupt request and to disable any further timer interrupts. The timer prescaler is cleared. The I bit in the CCR is cleared to enable external interrupts. All other registers and memory remain unaltered. All input/output lines remain unchanged. The processor can be brought out of stop mode only by an external interrupt or RESET. Refer to Figure 6-1. NOTE: If an external interrupt is pending when stop mode is entered, then stop mode will be exited immediately. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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