IMX8MPCEC datasheet(38/111 Pages) NXP

38 / 111 page

i.MX 8M Plus Applications Processor Datasheet for Consumer Products, Rev. 0, 03/2021

NXP Semiconductors

Electrical characteristics

3.4.2

DDR I/O DC electrical characteristics

The DDR I/O pads support LPDDR 4 and DDR4 operational modes. The DDR Memory Controller

(DDRMC) is compliant with JEDEC-compliant SDRAMs.

DDRMC operation is contingent upon the board’s DDR design adherence to the DDR design and layout

requirements stated in the hardware development guide for the i.MX 8M Plus application processor.

3.4.3

LVDS I/O DC parameters

The LVDS interface complies with TIA/EIA 644-A standard. See TIA/EIA STANDARD 644-A,

“Electrical Characteristics of Low Voltage Differential Signaling (LVDS) Interface Circuits” for details.

Table 26. GPIO DC parameters

Parameter

Symbol

Test Conditions

Min

Typ

Max

Unit

High-level output voltage

VOH (1.8 V)

IOH = 1.6/3.2/6.4/9.6 mA (1.8 V)

IOH = 2/4/8/12 mA (3.3 V)

0.8 x VDD

—

VDD

VOH (3.3 V)

0.8 x VDD

—

VDD

Low-level output voltage

VOL (1.8 V)

IOL = 1.6/3.2/6.4/9.6 mA (1.8 V)

IOL = 2/4/8/12 mA (3.3 V)

—

0.2 x VDD

VOL (3.3 V)

—

0.2 x VDD

High-level input voltage

VIH

—

0.7 x VDD

—

VDD + 0.3

Low-level input voltage

VIL

—

-0.3

—

0.3 x VDD

Pull-up resistor

—

VDD = 1.65 - 1.95V

Temp = 0 - 95 oC



Pull-down resistor

—



Pull-up resistor

—

VDD = 3.0 - 3.6V

Temp = 0 - 95 oC



Pull-down resistor

—



High level input current

IIH

—

-4

—

µA

Low level input current

IIL

—

-0.7

—

0.7

µA

Table 27. Additional leakage parameters

Parameter

Symbol

Pins

Min

Max

Unit

High level input current

IIH

USBx_Dx

-30

µA

MIPI_CSI

-4

ONOFF, POR_B

-1

Low level input current

IIL

USBx_Dx

-6

µA

MIPI_CSI, ONOFF, POR_B

-0.7

0.7

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