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MEC1632 bảng dữ liệu(PDF) 122 Page - Microchip Technology

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MEC1632 bảng dữ liệu(HTML) 122 Page - Microchip Technology

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MEC1632
DS00001592B-page 122
 2012-2018 Microchip Technology Inc.
Note 7-34
VTR availability in S4 - S5 may depend, for example, on whether AC power is available.
Note 7-35
the MEC1632 senses the VCC power state using the VCC_PWRGD input pin; i.e., VCC power is not
directly applied to this device.
Note 7-36
the PCI_CLK can start and stop in S0/S1 as defined in Ref[7].
TABLE 7-22:
TYPICAL MEC1632 POWER SUPPLIES VS. ACPI POWER STATES
ACPI Power State
Supply Name
S0
(FULL
ON)
S1
(POS)
S3
(STR)
S4
(STD)
S5
(SOFT
OFF)
G3
(MECH
OFF)
Description
VBAT
ON
ON
ON
ON
ON
ON
MEC1632 VBAT Well Supply
(assuming a TYPE 2
configuration as described in
Section 7.5.2, "Power Supply
Configurations," on
page 123)
VTR
ON
ON
ON
ON/OFF
ON/OFF
OFF
MEC1632 Suspend Supply.
(Note 7-34)
VCC
ON
ON
OFF
OFF
OFF
OFF
MEC1632 Runtime Supply
(Note 7-35)
TABLE 7-23:
TYPICAL MEC1632 CLOCKS VS. ACPI POWER STATES
ACPI Power State
Clock Name
S0
(FULL
ON)
S1
(POS)
S3
(STR)
S4
(STD)
S5
(SOFT
OFF)
G3
(MECH
OFF)
Description
32K Clock
Domain
(External Clock
Source)
ON
ON
ON
ON
ON
OFF/
ON
32K Clock Domain is
driven by an external
source, for example, by an
Intel ICH4M SUSCLK, the
32K Clock Domain is
running whenever
RSMRST is not asserted.
(see Ref[6]).
32K Clock
Domain
(Internal Clock
Source)
ON
ON
ON
ON
ON
ON
32K Clock Domain is
running whenever VBAT is
fully powered except
following a VBAT_POR as
described in "32K_EN," on
page 149.
Host Clock
Domain
ON
ON
OFF
OFF
OFF
OFF
The Host Clock Domain is
gated by the MEC1632
runtime supply (VCC) as
described in Section
7.4.11.4, "Host Clock
Domain," on page 120.
PCI_CLK
ON/OFF
ON/OFF
OFF
OFF
OFF
OFF
33MHz LPC Bus clock
input powered by the
MEC1632 runtime supply
(VCC). (Note 7-36)
Programmable
Clock Domains
and Fixed Clock
Domain
ON/OFF
ON/OFF
ON/OFF
OFF/ON
OFF/ON
OFF
These clocks are powered
by the MEC1632 suspend
supply (VTR) but may start
and stop as described in
Section 7.4.10, "Power
Management Interface,"
on page 111. (see also
Note 7-34)



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