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MEC1632 bảng dữ liệu(PDF) 99 Page - Microchip Technology |
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MEC1632 bảng dữ liệu(HTML) 99 Page - Microchip Technology |
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99 / 636 page ![]() 2012-2018 Microchip Technology Inc. DS00001592B-page 99 MEC1632 7.4.2 POWER SUPPLIES AND CLOCKING Table 7-5 illustrates clocking capabilities versus power supply availability. For more information, see Section 7.5, "Power Configuration," on page 121. Note 7-1 power supply states not illustrated in Table 7-5 are undefined (see also Section 7.5, "Power Configuration," on page 121). Note 7-2 this depends on the 32K_EN bit in the Clock Enable Register. FIGURE 7-1: Clock Generator BLOCK DIAGRAM TABLE 7-5: CLOCKS VS. POWER SUPPLIES Power Supply States ( Note 7-1) Clocks VBAT VTR VCC PCI Clock 32.768 KHz Silicon Oscillator 32.768 KHz Crystal Oscillator 32K External 20 MHz Oscillator OFF OFF OFF OFF OFF OFF OFF OFF ON OFF OFF ON/OFF (Note 7-2) OFF ON/OFF (Note 7-4) OFF ON/OFF (Note 7-5) OFF ON ON OFF ON/OFF (Note 7-3) ON ON ON ON/OFF VTR VBAT 20 MHz OSCILLATOR MCLK DOMAIN PROG. CLOCK DOMAIN DIVIDER/ DRIVERS/ ENABLES FCLK20M FIXED CLOCK DOMAIN DIVIDERS/ DRIVERS FCLK0.1M_EN HOST CLOCK DOMAIN DIVIDERS/ DRIVERS/ ENABLES HCLK1M_EN VCC_PWRGD PCLK_EC_EN PCLK_LPC_AHB_EN BLOCK SLEEP ENABLES SLEEP_FLAG CLOCK CONTROL & WAKE INTERFACE OSC_EN Block Sleep Enables FCLK10M_EN PCLK_EC_AHB_EN 32K CLOCK DOMAIN DRIVERS 32K_CLK32768 EC INTERFACE WAKE ARC_CLK_DISABLE All Block Clocking Status Outputs n CLOCK_TREE_GATING 32.768KHZ CLOCK DOMAIN 32 KHZ CLOCK SOURCES |
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