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MEC1632 bảng dữ liệu(PDF) 85 Page - Microchip Technology |
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MEC1632 bảng dữ liệu(HTML) 85 Page - Microchip Technology |
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85 / 636 page ![]() 2012-2018 Microchip Technology Inc. DS00001592B-page 85 MEC1632 Note 6-1 “Change” means either-edge change on any or all parallel IRQs routed to the Serial IRQ block. The “change” detection logic must run asynchronously to the PCI Clock and regardless of the Serial IRQ mode; i.e., “continuous” or “quiet”. TABLE 6-3: MEC1632 CLKRUN# FUNCTION SIRQ_MODE ( Bit[2] SerIRQ Mode in Device Mode Register) Internal Interrupt Request CLKRUN# Action 0 X X None 1 NO CHANGE X None CHANGE (Note 6-1) 0 None 1 Assert CLKRUN# FIGURE 6-3: CLKRUN# SYSTEM IMPLEMENTATION EXAMPLE FIGURE 6-4: CLOCK START ILLUSTRATION Note: • The signal “ANY CHANGE” is the same as “CHANGE” in Table 6-3. • The MEC1632 must continually monitor the state of CLKRUN# to maintain the PCI Clock until an active “any IRQ change” condition has been transferred to the host in a Serial IRQ cycle. For example, if “any IRQ change” is asserted before CLKRUN# is de-asserted (not shown in Figure 6-4), the MEC1632 must assert CLKRUN# as needed until the Serial IRQ cycle has completed. CLKRUN# PCICLK Target PCI CLOCK GENERATOR (Central Resource) Master MEC DEVICE PCI_CLK nCLKRUN SERIRQ MODE (Bit 2 of GR24) ANY CHANGE nCLKRUN DRIVEN BY MEC DEVICE MEC DEVICE STOPS DRIVING nCLKRUN (after two rising edges of PCI_CLK) 2 CLKS MIN. |
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