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MEC1632 bảng dữ liệu(PDF) 95 Page - Microchip Technology

tên linh kiện MEC1632
Giải thích chi tiết về linh kiện  Low Power 32-Bit Mobile Embedded Controller
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MEC1632 bảng dữ liệu(HTML) 95 Page - Microchip Technology

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 2012-2018 Microchip Technology Inc.
DS00001592B-page 95
MEC1632
7.0
POWER, CLOCKS, AND RESETS
7.1
General Description
The Power, Clocks, and Resets chapter includes descriptions of the MEC1632 Clock Generator, Power Configuration
and Reset Interface.The Clock Generator, in addition to describing clock sources, also features a Generic Block
Clocking Model and a Power Management Interface.The Reset Interface description includes internal and external
reset sources, as well as descriptions of an internal 1.8V Regulator and Power Mux. Other descriptions in this chapter
include References, a Port List, Interrupt Interface and a Registers Interface.
The Power Configuration, Clock Generator and Reset circuits have the following features:
7.1.1
Power Configuration
7.1.2
Clock Generator
7.1.3
Reset Interface
7.2
References
1.
Advanced Configuration and Power Interface Specification, Revision 1.0b, February 2, 1999.
2.
Intel® 82801DBM I/O Controller Hub 4 Mobile (ICH4-M), Data Sheet, Order Number: 252337-001, Intel Corp.,
January 2003.
3.
PCI Mobile Design Guide, Version 1.1, PCI-SIG, December 18, 1998.
TABLE 7-1:
Power Configuration FEATURES
Feature
Page
Description of Power Supplies and Clocks ACPI Context
121
Enumerated Power Supply Configurations
123
Power-Up Sequence Definition
124
1.8V Regulator
128
Power Mux
129
TABLE 7-2:
Clock Generator FEATURES
Feature
Page
Three asynchronous clock sources: 20 MHz Oscillator, 32K Clock
Domain and PCI_CLK
100
Efficient Logic Design and Controllable Master Clock Trees to Mini-
mize Power Consumption
108
Independent EC-driven Power Management Interface
111
20 MHz Oscillator Optimized for 115.2K baud 16C550A UART Sup-
port
–
Generic Block Clocking Model
105
EC-accessible Registers Interface
130
TABLE 7-3:
Reset Interface FEATURES
Feature
Page
VTR and VBAT Reset Signaling (VTRGD, VBAT_POR, nSYS_RST,
nEC_RST)
124
RESET Pin Interface
126
VCC Reset Signaling (VCC Power Good)
129
Watch-Dog Timer Forced Reset
130
Interrupt Interface
150



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