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MPC8308CVMADDA bảng dữ liệu(PDF) 39 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  MPC8308 PowerQUICC II Pro Processor Hardware Specification
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MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 4
Freescale Semiconductor
39
PCI Express
AC peak common mode
input voltage
VRX-CM-ACp
VPEACPCMRX = |VRXD+ + VRXD-|/2 -
VRX-CM-DC
VRX-CM-DC = DC(avg) of |VRX-D+ +
VRX-D-|/2
——
150
mV
2
Differential return loss
RLRX-DIFF
Measured over 50 MHz to 1.25 GHz
with the D+ and D- lines biased at +300
mV and -300 mV, respectively.
15
—
—
dB
4
Common mode return loss
RLRX-CM
Measured over 50 MHz to 1.25 GHz
with the D+ and D- lines biased at 0 V.
6—
—
dB
4
DC differential input
impedance
ZRX-DIFF-DC
RX DC differential mode impedance.
80
100
120
5
DC Input Impedance
ZRX-DC
Required RX D+ as well as D- DC
Impedance (50 ± 20% tolerance).
40
50
60
2, 5
Powered down DC input
impedance
ZRX-HIGH-IMP-DC
Required RX D+ as well as D- DC
Impedance when the Receiver
terminations do not have power.
200 k
—
—
6
Electrical idle detect
threshold
VRX-IDLE-DET-DIFFp-p VPEEIDT = 2*|VRX-D+ -VRX-D-|
Measured at the package pins of the
Receiver
65
—
175
mV
—
Unexpected Electrical Idle
Enter Detect Threshold
Integration Time
TRX-IDLE-DET-DIFF-
ENTERTIME
An unexpected Electrical Idle
(Vrx-diffp-p < Vrx-idle-det-diffp-p) must
be recognized no longer than
Trx-idle-det-diff-entertime to signal an
unexpected idle condition.
——
10
ms
—
Total Skew
LRX-SKEW
Skew across all lanes on a Link. This
includes variation in the length of SKP
ordered set (for example, COM and one
to five SKP Symbols) at the RX as well
as any delay differences arising from
the interconnect itself.
—
—
20
ns
—
Table 35. Differential Receiver (RX) Input Specifications (continued)
Parameter
Symbol
Comments
Min
Typical
Max
Units Note



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