MPC8308CVMADDA datasheet(38/95 Pages) NXP

38 / 95 page

MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 4

Freescale Semiconductor

PCI Express

Figure 27. Minimum Transmitter Timing and Voltage Output Compliance Specifications

11.4.3

Differential Receiver (RX) Input Specifications

This table defines the specifications for the differential input at all receivers (RXs). The parameters are

specified at the component pins.

Table 35. Differential Receiver (RX) Input Specifications

Parameter

Symbol

Comments

Min

Typical

Max

Units Note

Unit interval

Each UPERX is 400 ps ± 300 ppm.

UPERX does not account for Spread

Spectrum Clock dictated variations.

399.88

400

400.12

Differential peak-to-peak

output voltage

VRX-DIFFp-p

VPEDPPRX = 2*|VRX-D+ - VRX-D-|

0.175

—

1.200

Minimum receiver eye width

TRX-EYE

The maximum interconnect media and

Transmitter jitter that can be tolerated

by the Receiver can be derived as

TRX-MAX-JITTER = 1 - UPEEWRX= 0.6 UI.

0.4

—

2, 3

Maximum time between the

jitter median and maximum

deviation from the median.

TRX-EYE-MEDIAN-to-

MAX-JITTER

Jitter is defined as the measurement

variation of the crossing points

(VPEDPPRX = 0 V) in relation to a

recovered TX UI. A recovered TX UI is

calculated over 3500 consecutive unit

intervals of sample data. Jitter is

measured using all edges of the 250

consecutive UI in the center of the 3500

UI used for calculating the TX UI.

——

0.3

2, 3,

[De-emphasized Bit]

566 mV (3 dB) >= VTX-DIFFp-p-MIN >= 505 mV (4 dB)

[Transition Bit]

VTX-DIFFp-p-MIN = 800 mV

[Transition Bit]

VTX-DIFFp-p-MIN = 800 mV

0.7 UI = UI – 0.3 UI(JTX-TOTAL-MAX)

VTX-DIFF = 0 mV

(D+ D– Crossing Point)

VTX-DIFF = 0 mV

(D+ D– Crossing Point)

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