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ADUC7023BCPZ62I-R7 bảng dữ liệu(PDF) 15 Page - Analog Devices |
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ADUC7023BCPZ62I-R7 bảng dữ liệu(HTML) 15 Page - Analog Devices |
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15 / 98 page  Data Sheet ADuC7023 Rev. H | Page 15 of 98 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS NOTES 1. EXPOSED PAD. THE PADDLE NEEDS TO BE SOLDERED AND EITHER CONNECTED TO AGND OR LEFT FLOATING. 1 AVDD 2 GNDREF 3 DAC0 4 DAC1 5 DAC2 6 DAC3 7 P1.4/ADC10/PLAO[3] 8 P2.0/ADC12/PWM4/PLAI[7] 9 10 P0.5/SDA0/PLAI[1]/COMPOUT 23 RTCK 24 TMS 25 P0.0/nTRST/ADCBUSYPLAI[8]/BM 26 P0.1/PLAI[9]/TDO 27 P0.2/PLAO[8]/TDI 28 P0.3/PLAO[9]/TCK 29 P1.5/ADC6/PWMTRIPINPUT/PLAO[4] 30 P2.2/ADC7/SYNC/PLAO[6] 22 XCLKO 21 XCLKI ADuC7023 TOP VIEW (Not to Scale) P0.4/IRQ0/SCL0/PLAI[0]/CONVSTART Figure 7. 40-Lead LFCSP Pin Configuration AVDD GNDREF DAC0 DAC1 DAC2 DAC3 P0.5/SDA0/PLAI[1]/COMPOUT P0.3/PLAO[9]/TCK P0.2/PLAO[8]/TDI P0.1/PLAI[9]/TDO P0.0/nTRST/ADCBUSY/PLAI[8]/BM TMS RTCK XCLKO XCLKI 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 ADuC7023 TOP VIEW (Not to Scale) NOTES 1. EXPOSED PAD. THE PADDLE NEEDS TO BE SOLDERED AND EITHER CONNECTED TO AGND OR LEFT FLOATING. P0.4/IRQ0/SCL0/PLAI[0]/CONVSTART Figure 8. 32-Lead LFCSP Pin Configuration ADuC7023 TOP VIEW (BALL SIDE DOWN) Not to Scale 1 A B C D E F A1 B1 C1 D1 E1 F1 A2 B2 C2 D2 E2 F2 A3 B3 C3 D3 E3 F3 A4 B4 C4 D4 E4 F4 A5 B5 C5 D5 E5 F5 A6 B6 C6 D6 E6 F6 234 BALL A1 CORNER 56 Figure 9. 36-Lead WLCSP Pin Configuration Table 9. Pin Function Descriptions Pin No. 40- LFCSP 32- LFCSP 36- WLCSP Mnemonic Description 0 0 N/A Exposed Paddle Exposed Pad. The paddle needs to be soldered and either connected to AGND or left floating. 36 28 A4 ADC0 Single-Ended or Differential Analog Input 0. 37 29 B4 ADC1 Single-Ended or Differential Analog Input 1. 38 30 A5 ADC2/CMP0 Single-Ended or Differential Analog Input 2/Comparator Positive Input. 39 31 B5 ADC3/CMP1 Single-Ended or Differential Analog Input 3/Comparator Negative Input. 32 N/A B2 P2.4/ADC9/PLAI[10] General-Purpose Input and Output Port 2.4/ADC Single-Ended or Dif- ferential Analog Input/Programmable Logic Array Input Element 10. By default, this pin is configured as a digital input with a weak pull-up resistor enabled. |
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