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26HS01GTAM03 bảng dữ liệu(PDF) 116 Page - Infineon Technologies AG

tên linh kiện 26HS01GTAM03
Giải thích chi tiết về linh kiện  256Mb/512Mb/1Gb SEMPER??Flash HYPERBUS??interface, 1.8V/3.0V
PDF  166 Pages
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nhà sản xuất  INFINEON [Infineon Technologies AG]
Trang chủ  http://www.infineon.com
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002-12337 Rev. *Y
2022-01-18
256Mb/512Mb/1Gb SEMPER™ Flash
HYPERBUS™ interface, 1.8V/3.0V
Registers
5.3.9
Memory array data integrity check CRC register (DCRV) (x1)
The Memory Array Data Integrity Check CRC Register (DCRV) stores the results of the CRC calculation on the data
contained between the specified starting and ending addresses.
5.3.10
ECC status register (ESCV) (x1)
The ECC Status Register (ESCV) contains the ECC status of any error correction action performed on the unit data
whose byte was addressed during last read.
Note Unit data is defined as the number of bytes over which the ECC is calculated. HL-T/HS-T family devices have
a 16 bytes (128 bits) unit data.
Table 104
Memory array data integrity check CRC register (x1)
Bit number
Name
Function
Read/write
N = Nonvolatile
V = Volatile
Factory
default
(hex)
Description
DCRV[31:0]
DTCRCV[31:0]
Memory Array Data
Integrity Check CRC
Checksum Value
V -> R
0x00000000
Description: The DTCRCV[31:0 bits store the
checksum value of the CRC process on the
memory array data contained within the
starting address and the ending address.
Selection Options: Checksum Value
Dependency: N/A
Table 105
ECC status register (x1)
Bit number
Name
Function
Read/write
N = Nonvolatile
V = Volatile
Factory
default
(binary)
Description
ECSV[7:5]
RESRVD
Reserved for Future Use
V -> R
000
This bit is Reserved for future use. This bit must always be
written/loaded to its default state.
ECSV[4]
ECC2BT
ECC Error 2-bit Error
Detection Flag
V -> R
0
Description: The ECC2BT bit indicates that a 2-bit ECC
Error was detected in the data unit (16 bytes). A Clear ECC
Status Register transaction (CLECC_0_0) will reset
ECC2BT.
Note ECC2BT is updated every time any memory address
is read and is sticky, i.e. once it is set, it remains set. The
ECC2BT status is maintained until a Clear ECC Status
Register transaction (CLECC_0_0) is executed.
Note ECC1BT is not valid if ECC2BT status flag is set.
Selection Options:
0 = No 2-Bit ECC Error was detected in the data unit (16
bytes)
1 = 2-bit ECC Error was detected in the data unit (16 bytes)
Dependency: CFR4x[3]
ECSV[3]
ECC1BT
ECC Error 1-bit Error
Detection and
Correction Flag
V -> R
0
Description: The ECC1BT bit indicates that a 1-bit ECC
Error was detected and corrected in the data unit (16
bytes). A Clear ECC Status Register transaction
(CLECC_0_0) will reset ECC1BT.
Note ECC1BT is updated every time any memory address
is read and is sticky, i.e. once it is set, it remains set. The
ECC1BT status is maintained until a Clear ECC Status
Register transaction (CLECC_0_0) is executed.
Selection Options:
0 = No 1-Bit ECC Error was detected in the data unit (16
bytes)
1 = 1-bit ECC Error was detected in the data unit (16 bytes)
Dependency: N/A
ECSV[2:0]
RESRVD
Reserved for Future Use
V -> R
000
This bit is Reserved for future use. This bit must always be
written/loaded to its default state.



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