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26HS01GTAM03 bảng dữ liệu(PDF) 80 Page - Infineon Technologies AG

tên linh kiện 26HS01GTAM03
Giải thích chi tiết về linh kiện  256Mb/512Mb/1Gb SEMPER??Flash HYPERBUS??interface, 1.8V/3.0V
PDF  166 Pages
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nhà sản xuất  INFINEON [Infineon Technologies AG]
Trang chủ  http://www.infineon.com
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26HS01GTAM03 bảng dữ liệu(HTML) 80 Page - Infineon Technologies AG

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002-12337 Rev. *Y
2022-01-18
256Mb/512Mb/1Gb SEMPER™ Flash
HYPERBUS™ interface, 1.8V/3.0V
Features
4.13
Error types and reporting - HYPERBUS™
There are three types of errors reported by the embedded operation status methods. Depending on the error
type, the status reported and procedure for clearing the error status is different.
The following is the clearing of error status:
• If an ASO was entered before the error, the device remains entered in the ASO awaiting ASO read or a command
write.
• If an erase was suspended before the error, the device returns to the erase suspended state awaiting flash array
read or a command write.
• Otherwise, the device will be in Standby state awaiting flash array read or a command write.
4.13.1
Protection error
If an embedded algorithm attempts to change data within a protected area (program, or erase of a protected
sector or OTP area), the device (EAC) goes busy for a period of 20 to 100 µs then returns to normal operation.
Protection mechanisms include, PPB and Locks. During the busy period, the Status Register shows not ready with
invalid status bits (SR[7] = 0). If a programming or erase operation is attempted to a locked region, the operation
will be aborted and the failure will be indicated in the Status Register.
Commands that are accepted during the protection error status busy period are:
• Status Register Read
When the busy period ends the device returns to normal operation, and the Status Register shows ready with
valid status bits. The device is ready for flash array read or write of a new command.
After the protection error status busy period, the Status Register will show the following:
• SR[7] = 1; Valid status displayed
• SR[6] = X; May or may not be erase suspended after the protection error busy period
• SR[5] = 1 on erase error, else = 0
• SR[4] = 1 on program or password unlock error, else = 0
• SR[3] = X; Treat as “don’t care” (masked)
• SR[2] = 0; No Program in suspension
• SR[1] = 1; Error due to attempting to change a protected location
• SR[0] = X; Treat as “don’t care” (masked)
Commands that are accepted after the protection error status busy period are:
• Any command
For cases where the Program Status Bit is set a further program, operation will immediately clear SR[4]. For cases
where the Erase Status Bit is set a further erase, operation will immediately clear SR[6].



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