26HS01GTAM03 datasheet(98/166 Pages) INFINEON

98 / 166 page

Datasheet

98 of 166

002-12337 Rev. *Y

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

HYPERBUS™ interface, 1.8V/3.0V

Registers

5.2.8

Advanced sector protection register (ASPO) (x8)

The ASP Register (ASPO) configures the behavior of Advanced Sector Protection scheme.

Table 75

Advanced sector protection register (x8)

Bit number

Name

Function

Read/write

N = Nonvolatile

V = Volatile

Factory

default

(binary)

Description

ASPO[15:6]

RESVRD

Reserved for Future Use

N => R/1

1111111111 This bit is Reserved for future use. This bit must always be

written/loaded to its default state.

ASPO[5]

ASPRDP

Read Password Based

Protection Selection

N => R/1

Description:

The ASPRDP bit selects the Read Password Mode

Protection mode. Read Password Protection mode works

in conjunction with Password Protection mode to protect

all sectors from Read/Erase/Program. Based on

TB4KBS[1:0] configuration bit (CFR1x[9:8]), either the top

or bottom sector is available for reading.

Selection Options:

0 = Read Password Protection Mode is enabled

1 = Read Password Protection Mode is disabled

Dependency: TB4KBS[1:0] (CFR1x[9:8])

ASPO[4]

RESVRD

Reserved for Future Use

N => R/1

This bit is Reserved for future use. This bit must always be

written/loaded to its default state.

ASPO[3]

RESVRD

Reserved for Future Use

N => R/1

This bit is Reserved for future use. This bit must always be

written/loaded to its default state.

ASPO[2]

ASPPWD

Password Based

Protection Selection

N => R/1

Description:

The ASPPWD bit selects the Password Protection Mode.

Password Protection mode protects all PPB bits, all

registers and all memory from erase/program till the

correct password is entered. The ASPPWD can also be

used in combination with the ASPRDP to protect all

registers and all memory from erase/program and to

protect sectors from being read as well till the correct

password is provided – except for top or bottom sector

which is available for reading based on TB4KBS[1:0]

configuration bit (CFR1x[9:8]).

Note When ASPPWD is selected, ASPO[15:0] and

PWDO[63:0] are protected against write operations..

Selection Options:

0 = Password Protection Mode is enabled

1 = Password Protection Mode is disabled

Dependency: ASPPER (ASPO[1])

ASPO[1]

ASPPER

Persistent Protection

Selection (Register

Protection Selection)

N => R/1

Description:

The ASPPER bit selects the Persistent Protection Mode.

The Persistent Protection mode (ASPPER) protects the

ASPO[15:0] Register from erase or program.

Selection Options:

0 = Persistent Protection Mode is enabled

1 = Persistent Protection Mode is disabled

Dependency: ASPPWD (ASPO[2])

ASPO[0]

RESVRD

Reserved for Future Use

N => R/1

This bit is Reserved for future use. This bit must always be

written/loaded to its default state.

26HS01GTAM03 bảng dữ liệu(PDF) 98 Page - Infineon Technologies AG

26HS01GTAM03 bảng dữ liệu(HTML) 98 Page - Infineon Technologies AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL