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Z8F082ASH020SC bảng dữ liệu(PDF) 50 Page - Zilog, Inc. |
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Z8F082ASH020SC bảng dữ liệu(HTML) 50 Page - Zilog, Inc. |
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50 / 244 page ![]() PS024705-0405 P R E L I M I N A R Y General-Purpose I/O Z8 Encore! XP® F08xA Series Product Specification 32 Figure 6.GPIO Port Pin Block Diagram GPIO Alternate Functions Many of the GPIO port pins can be used for general-purpose I/O and access to on-chip peripheral functions such as the timers and serial communication devices. The Port A–D Alternate Function sub-registers configure these pins for either General-Purpose I/O or alternate function operation. When a pin is configured for alternate function, control of the port pin direction (input/output) is passed from the Port A–D Data Direction registers to the alternate function assigned to this pin. Table 14 on page 34 lists the alternate functions possible with each port pin. The alternate function associated at a pin is defined through Alternate Function Sets sub-registers AFS1 and AFS2. The crystal oscillator functionality is not controlled by the GPIO block. When the crystal oscillator is enabled in the oscillator control block, the GPIO functionality of PA0 and PA1 is overridden. In that case, those pins function as input and output for the crystal oscillator. PA0 and PA6 contain two different timer functions, a timer input and a complementary timer output. Both of these functions require the same GPIO configuration, the selection between the two is based on the timer mode. See “Timers” on page 58 for more details. D Q DQ D Q GND VDD Port Output Control Port Data Direction Port Output Data Register Port Input Data Register Port Pin DATA Bus System Clock System Clock Schmitt Trigger |
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