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Z8F082ASH020SC bảng dữ liệu(PDF) 28 Page - Zilog, Inc. |
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Z8F082ASH020SC bảng dữ liệu(HTML) 28 Page - Zilog, Inc. |
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28 / 244 page ![]() PS024705-0405 P R E L I M I N A R Y Pin Description Z8 Encore! XP® F08xA Series Product Specification 10 Transimpedance Amplifier AMPINP/AMPINN I Transimpedance amplifier inputs. If enabled, these pins drive the positive and negative amplifier inputs respectively. AMPOUT O Transimpedance amplifier output. If enabled, this pin is driven by the on- chip transimpedance amplifier. Oscillators XIN I External Crystal Input. This is the input pin to the crystal oscillator. A crystal can be connected between it and the XOUT pin to form the oscillator. In addition, this pin is used with external RC networks or external clock drivers to provide the system clock. XOUT O External Crystal Output. This pin is the output of the crystal oscillator. A crystal can be connected between it and the XIN pin to form the oscillator. Clock Input CLKIN I Clock Input Signal. This pin may be used to input a TTL-level signal to be used as the system clock. LED Drivers LED O Direct LED drive capability. All port C pins have the capability to drive an LED without any other external components. These pins have programmable drive strengths set by the GPIO block. On-Chip Debugger DBG I/O Debug. This signal is the control and data input and output to and from the On-Chip Debugger. The DBG pin is open-drain and requires an external pull-up resistor to ensure proper operation. Reset RESET I/O RESET. Generates a Reset when asserted (driven Low). Also serves as a reset indicator; the Z8 Encore! XP® forces this pin low when in reset. This pin is open-drain and features an enabled internal pull-up resistor. Power Supply VDD I Digital Power Supply. AVDD I Analog Power Supply. Table 3. Signal Descriptions (Continued) Signal Mnemonic I/O Description Caution: |
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