Z8F082ASH020SC datasheet(35/244 Pages) ZILOG

35 / 244 page

PS024705-0405

P R E L I M I N A R Y

Z8 Encore! XP® F08xA Series

Product Specification

FC2

IRQ0 Enable Low Bit

IRQ0ENL

FC3

Interrupt Request 1

IRQ1

FC4

IRQ1 Enable High Bit

IRQ1ENH

FC5

IRQ1 Enable Low Bit

IRQ1ENL

FC6

Interrupt Request 2

IRQ2

FC7

IRQ2 Enable High Bit

IRQ2ENH

FC8

IRQ2 Enable Low Bit

IRQ2ENL

FC9–FCC

Reserved

—

FCD

Interrupt Edge Select

IRQES

FCE

Shared Interrupt Select

IRQSS

FCF

Interrupt Control

IRQCTL

GPIO Port A

FD0

Port A Address

PAADDR

FD1

Port A Control

PACTL

FD2

Port A Input Data

PAIN

FD3

Port A Output Data

PAOUT

GPIO Port B

FD4

Port B Address

PBADDR

FD5

Port B Control

PBCTL

FD6

Port B Input Data

PBIN

FD7

Port B Output Data

PBOUT

GPIO Port C

FD8

Port C Address

PCADDR

FD9

Port C Control

PCCTL

FDA

Port C Input Data

PCIN

FDB

Port C Output Data

PCOUT

GPIO Port D

FDC

Port D Address

PDADDR

FDD

Port D Control

PDCTL

FDE

Reserved

—

FDF

Port D Output Data

PDOUT

FE0–FEF

Reserved

—

Watch-Dog Timer (WDT)

Table 7. Register File Address Map (Continued)

Address (Hex)

Mnemonic

Reset (Hex)

Page #

XX=Undefined

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