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Z8F082ASH020SC bảng dữ liệu(PDF) 37 Page - Zilog, Inc. |
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Z8F082ASH020SC bảng dữ liệu(HTML) 37 Page - Zilog, Inc. |
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37 / 244 page ![]() PS024705-0405 P R E L I M I N A R Y Reset and STOP Mode Recovery Z8 Encore! XP® F08xA Series Product Specification 19 Reset and STOP Mode Recovery Overview The Reset Controller within the Z8 Encore! XP® F08xA Series controls Reset and STOP Mode Recovery operation and provides indication of low supply voltage conditions. In typical operation, the following events cause a Reset: • Power-On Reset (POR) • Voltage Brown-Out (VBO) • Watch-Dog Timer time-out (when configured by the WDT_RES Flash Option Bit to initiate a reset) • External RESET pin assertion (when the alternate RESET function is enabled by the GPIO register) • On-Chip Debugger initiated Reset (OCDCTL[0] set to 1) When the device is in STOP mode, a STOP Mode Recovery is initiated by either of the following: • Watch-Dog Timer time-out • GPIO Port input pin transition on an enabled STOP Mode Recovery source Reset Types The Z8 Encore! XP® F08xA Series provides several different types of Reset operation. STOP Mode Recovery is considered a form of Reset. Table 8 lists the types of Reset and their operating characteristics. The System Reset is longer if the external crystal oscillator is enabled by the Flash option bits, allowing additional time for oscillator start-up. Table 8. Reset and STOP Mode Recovery Characteristics and Latency Reset Type Reset Characteristics and Latency Control Registers eZ8 CPU Reset Latency (Delay) System Reset Reset (as applicable) Reset 66 Internal Precision Oscillator Cycles System Reset with Crystal Oscillator Enabled Reset (as applicable) Reset 5000 Internal Precision Oscillator Cycles |
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