56F8167 datasheet(31/184 Pages) FREESCALE

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Signal Pins

56F8367 Technical Data, Rev. 7.0

Freescale Semiconductor

Preliminary

MOSI0

(GPIOE5)

148

Input/

Output

Input/

Output

In reset,

output is

disabled,

pull-up is

enabled

SPI 0 Master Out/Slave In — This serial data pin is an output

from a master device and an input to a slave device. The master

device places data on the MOSI line a half-cycle before the clock

edge the slave device uses to latch the data.

Port E GPIO — This GPIO pin can be individually programmed as

an input or output pin.

After reset, the default state is MOSI0.

To deactivate the internal pull-up resistor, clear bit 5 in the

GPIOE_PUR register.

MISO0

(GPIOE6)

147

Input/

Output

Input/

Output

Input,

pull-up

enabled

SPI 0 Master In/Slave Out — This serial data pin is an input to a

master device and an output from a slave device. The MISO line

of a slave device is placed in the high-impedance state if the slave

device is not selected. The slave device places data on the MISO

line a half-cycle before the clock edge the master device uses to

latch the data.

Port E GPIO — This GPIO pin can be individually programmed as

an input or output pin.

After reset, the default state is MISO0.

To deactivate the internal pull-up resistor, clear bit 6 in the

GPIOE_PUR register.

SS0

(GPIOE7)

145

Input

Input/

Output

Input,

pull-up

enabled

SPI 0 Slave Select — SS0 is used in slave mode to indicate to

the SPI module that the current transfer is to be received.

Port E GPIO — This GPIO pin can be individually programmed as

input or output pin.

After reset, the default state is SS0.

To deactivate the internal pull-up resistor, clear bit 7 in the

GPIOE_PUR register.

Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA

Signal

Name

No.

Ball No.

Type

State

During

Reset

Signal Description

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