DSP56857 datasheet(255/662 Pages) FREESCALE

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Functional Description

Serial Communications Interface (SCI), Rev. 4

Freescale Semiconductor

10-19

The maximum percent difference between the receiver count and the transmitter count of a fast

9-bit character with no errors is:

10.6.4.8 Receiver Wake Up

In order for the SCI to ignore transmissions intended only for other receivers in multiple- receiver

systems, the receiver can be placed into a standby state. Setting the Receiver Wake Up (RWU)

bit in the SCI Control Register (SCICR) places the receiver into a standby state while receiver

interrupts are disabled.

The transmitting device can address messages to selected receivers by including addressing

information in the initial frame or frames of each message.

The WAKE bit in the SCI Control Register (SCICR) determines how the SCI is brought out of

the standby state to process an incoming message. The WAKE bit enables either idle line wake

up or address mark wake up:

•

Idle Input Line Wake Up (WAKE = 0)—In this wake up method, an idle condition on the

RXD pin clears the RWU bit and wakes up the SCI. The initial frame or frames of every

message contain addressing information. All receivers evaluate the addressing information,

and receivers for which the message is addressed process the following frames. Any

receiver for which a message is not addressed can set its RWU bit and return to the standby

state. The RWU bit remains set and the receiver remains on standby until another preamble

appears on the RXD pin.

Idle line wake up requires messages be separated by at least one preamble and no message

contains preambles.

The preamble waking a receiver does not set the receiver Idle (IDLE) bit or the Receive Data

•

Address Mark Wake up (WAKE = 1)—In this wake up method, a Logic 1 in the Most

Significant Bit (MSB) position of a frame clears the RWU bit and wakes up the SCI. The

Logic 1 in the MSB position marks a frame as an address frame, containing the addressing

information. All receivers evaluate the addressing information as well as the receivers for

which the message is addressed in the following frames. Any receiver for which a message

is not addressed can set its RWU bit and return to the standby state. The RWU bit remains

set and the receiver remains on standby until another address frame appears on the RXD pin.

The Logic 1 MSB of an address frame clears the receiver’s RWU bit before the Stop bit is

received, setting the RDRF flag.

170

176

–

170

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100

3.53%

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