DSP56857 datasheet(253/662 Pages) FREESCALE

253 / 662 page

Functional Description

Serial Communications Interface (SCI), Rev. 4

Freescale Semiconductor

10-17

10.6.4.5 Baud Rate Tolerance

A transmitting device may be operating at a baud rate below or above the receiver baud rate.

Accumulated bit time misalignment can cause one of the three Stop bit data samples to fall

outside the actual Stop bit. Then a noise error occurs. If more than one of the samples is outside

the Stop bit, a framing error occurs. In most applications, the baud rate tolerance is much more

than the degree of misalignment that is likely to occur.

As the receiver samples an incoming frame, it resynchronizes the RT clock on any valid falling

edge within the frame. Re-synchronization within frames corrects misalignments between

transmitter bit times and receiver bit times.

10.6.4.6 Slow Data Tolerance

Figure 10-13 explains how much a slow received frame can be misaligned without causing a

noise error or a framing error. The slow Stop bit begins at RT8 instead of RT1, it arrives in time

for the Stop bit data samples at RT8, RT9, and RT10.

Figure 10-13. Slow Data

For an 8-bit data character, data sampling of the Stop bit takes the receiver 9-bit

× 16 RT cycles + 10 RT cycles = 154 RT cycles.

With the misaligned character shown in Figure 10-13, the receiver counts 154 RT cycles at the

point when the count of the transmitting device is 9-bit

× 16 RT cycles + 3 RT

cycles = 147 RT cycles.

The maximum percent difference between the receiver count and the transmitter count of a slow

8-bit data character with no errors is:

For a 9-bit data character, data sampling of the Stop bit takes the receiver 10-bit

× 16 RT cycles + 10 RT cycles = 170 RT cycles.

MSB

STOP

DATA

SAMPLES

RECEIVER

RT CLOCK

154

147

–

154

------------------------

100

4.54%

DSP56857 bảng dữ liệu(PDF) 253 Page - Freescale Semiconductor, Inc