DSP56857 datasheet(213/662 Pages) FREESCALE

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Host Control Interrupt Vector

Overview, Rev. 4

Freescale Semiconductor

8-35

8.8 Wait and Stop Mode Operations

The system clocks and the 56800E are turned off during Wait and Stop modes. The ITCN will

signal a pending IRQ to the System Integration Module (SIM) to restart the clocks and service the

IRQ. An IRQ can only wake up the core if the IRQ is enabled prior to entering the Wait or Stop

mode. Also, the IRQA and IRQB signals automatically become low level sensitive in these

modes even if the Control Register bits are set to make them falling edge sensitive. This is

because there is no clock available to detect the falling edge.

8.9 Host Control Interrupt Vector

The Host Command IRQ, vector 49, acts differently than the other IRQs. The vector 49 value

driven onto the lower eight bits of VAB in response to this IRQ isn’t fixed as it is for the other

IRQs. The Host I/F module supplies these lower bits and the ITCN uses them when the interrupt

to the 56800E is in response to the Host Command IRQ. The ITCN also asserts the

HP_IRQ_ACK signal back to the Host Port module when the ITCN receives acknowledgement

from the CPU in response to the Host Command IRQ.

HI8

111

P:$DE

Available for Host Command

Not on 855

HI8

112

P:$E0

Available for Host Command

Not on 855

HI8

113

P:$E2

Available for Host Command

Not on 855

HI8

114

P:$E4

Available for Host Command

Not on 855

HI8

115

P:$E6

Available for Host Command

Not on 855

HI8

116

P:$E8

Available for Host Command

Not on 855

HI8

117

P:$EA

Available for Host Command

Not on 855

HI8

118

P:$EC

Available for Host Command

Not on 855

HI8

119

P:$EE

Available for Host Command

Not on 855

HI8

120

P:$F0

Available for Host Command

Not on 855

HI8

121

P:$F2

Available for Host Command

Not on 855

HI8

122

P:$F4

Available for Host Command

Not on 855

HI8

123

P:$F6

Available for Host Command

Not on 855

HI8

124

P:$F8

Available for Host Command

Not on 855

HI8

125

P:$FA

Available for Host Command

Not on 855

HI8

126

P:$FC

Available for Host Command

Not on 855

HI8

127

P:$FE

Available for Host Command

Not on 855

Table 8-3. Interrupt Vector Table Contents (Continued)

Peripheral

Vector

Number

Priority

Level

Vector

Base

Address +

Interrupt Function

Chip

Exceptions

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