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MSP432P411VIPZ bảng dữ liệu(PDF) 112 Page - Texas Instruments |
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MSP432P411VIPZ bảng dữ liệu(HTML) 112 Page - Texas Instruments |
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112 / 212 page  112 MSP432P4111, MSP432P4011, MSP432P411Y MSP432P401Y, MSP432P411V, MSP432P401V SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018 www.ti.com Submit Documentation Feedback Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V Detailed Description Copyright © 2017–2018, Texas Instruments Incorporated Table 6-26. DMA Registers (Base Address: 0x4000_E000) (continued) REGISTER NAME ACRONYM OFFSET Channel 3 Source Configuration DMA_CH3_SRCCFG 01Ch Channel 4 Source Configuration DMA_CH4_SRCCFG 020h Channel 5 Source Configuration DMA_CH5_SRCCFG 024h Channel 6 Source Configuration DMA_CH6_SRCCFG 028h Channel 7 Source Configuration DMA_CH7_SRCCFG 02Ch Interrupt 1 Source Channel Configuration DMA_INT1_SRCCFG 100h Interrupt 2 Source Channel Configuration DMA_INT2_SRCCFG 104h Interrupt 3 Source Channel Configuration DMA_INT3_SRCCFG 108h Interrupt 0 Source Channel Flag DMA_INT0_SRCFLG 110h Interrupt 0 Source Channel Clear Flag DMA_INT0_CLRFLG 114h Status DMA_STAT 1000h Configuration DMA_CFG 1004h Channel Control Data Base Pointer DMA_CTLBASE 1008h Channel Alternate Control Data Base Pointer DMA_ALTBASE 100Ch Channel Wait on Request Status DMA_WAITSTAT 1010h Channel Software Request DMA_SWREQ 1014h Channel Useburst Set DMA_USEBURSTSET 1018h Channel Useburst Clear DMA_USEBURSTCLR 101Ch Channel Request Mask Set DMA_REQMASKSET 1020h Channel Request Mask Clear DMA_REQMASKCLR 1024h Channel Enable Set DMA_ENASET 1028h Channel Enable Clear DMA_ENACLR 102Ch Channel Primary-Alternate Set DMA_ALTSET 1030h Channel Primary-Alternate Clear DMA_ALTCLR 1034h Channel Priority Set DMA_PRIOSET 1038h Channel Priority Clear DMA_PRIOCLR 103Ch Bus Error Clear DMA_ERRCLR 104Ch Table 6-27. PCM Registers (Base Address: 0x4001_0000) REGISTER NAME ACRONYM OFFSET Control 0 PCMCTL0 00h Control 1 PCMCTL1 04h Interrupt Enable PCMIE 08h Interrupt Flag PCMIFG 0Ch Clear Interrupt Flag PCMCLRIFG 10h Table 6-28. CS Registers (Base Address: 0x4001_0400) REGISTER NAME ACRONYM OFFSET Key CSKEY 00h Control 0 CSCTL0 04h Control 1 CSCTL1 08h Control 2 CSCTL2 0Ch Control 3 CSCTL3 10h Clock Enable CSCLKEN 30h Status CSSTAT 34h Interrupt Enable CSIE 40h Interrupt Flag CSIFG 48h |
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