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MSP432P411VIPZ bảng dữ liệu(PDF) 196 Page - Texas Instruments |
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MSP432P411VIPZ bảng dữ liệu(HTML) 196 Page - Texas Instruments |
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196 / 212 page ![]() ID0 register ID1 register ID2 register ID3 register ID4 register ID5 register ID6 register ID7 register 7 0 7 0 7 0 7 0 7 0 7 0 7 0 7 0 63 5655 48 47 40 39 36 35 32 31 28 27 24 23 20 19 18 12 11 0 Conceptual 64-bit Peripheral ID Part Number JEP106 ID code JEP106 code is used Revision Customer Modified RevAnd JEP106 Continuation Code 4KB count Reserved, RAZ 0 0 0 0 0 0 1 0 1 1 1 1 1 0 1 1 1 0 1 1 0 1 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Bits with no value shown are IMPLEMENTATION DEFINED. Other bits not shown as Reserved are for an implementation designed by Arm Limited. 196 MSP432P4111, MSP432P4011, MSP432P411Y MSP432P401Y, MSP432P411V, MSP432P401V SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018 www.ti.com Submit Documentation Feedback Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V Detailed Description Copyright © 2017–2018, Texas Instruments Incorporated From Figure 6-24 it is evident that a one-to-one mapping is not possible for the following fields from Table 6-90 1. Version: IEEE 1149.1 defines a 4-bit field, whereas the CoreSight™ compliant PID registers have 4 bits each for Revision (major revision) and RevAnd (minor revision). 2. Part Number: IEEE 1149.1 defines a 16-bit entity. However, the PID registers in the ROM table have only 12 bits reserved for this purpose (part number in the PID1 and PID0 registers). For the MSP432P4xx family, the Revision and RevAnd fields are the major and minor revisions. Also the 4-bit customer-modified field extends the part number to 16 bits by accommodating all the fields needed by IEEE 1149.1 into the ROM table. The ROM table with IEEE 1149.1-complaint device IDCODE for MSP432P4x1x device example is 0000- 1011-1011-0100-1101-0000-0010-1111 (see Figure 6-25). Figure 6-25. ROM PID Entries for MSP432P4x1x Device |
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