L6706TR datasheet(6/47 Pages) STMICROELECTRONICS

6 / 47 page

Pins description and connection diagrams

L6706

6/47

Doc ID 15698 Rev 2

Pins description and connection diagrams

Figure 3.

Pins connection (top view)

2.1

Pin description

123456789

OFFSET

OVPSEL

OCSET

OSC/FAULT

SSOSC/FLIMIT

OUTEN

CS+

CS-

INT1

BOOT

UGATE

PHASE

PGND

L6706

VCCDR

N.C.

INT4

N.C.

LGATE

VID0

INT3

Table 2.

Pin description

N°

Name

Description

1DGND

Digital GND.

It must be connected to PGND (power ground).

2SGND

All the internal references are referred to this pin.

Connect it to the PCB signal ground.

3VCC

Device supply voltage pin.

The operative supply voltage is 12 V ±15%. Filter with 1 x 1 µF MLCC capacitor

vs. SGND.

4COMP

Error amplifier output.

Connect with an RF - CF//CP vs. FB pin. The device cannot be disabled by

pulling down this pin.

5FB

Error amplifier inverting input pin.

Connect with a resistor RFB vs. VSEN and with an RF - CF//CP vs. COMP pin. A

current proportional to the load current is sourced from this pin in order to

implement the droop effect. See “Droop function” Section for details.

VSEN

Output voltage monitor, manages OVP/UVP protections and FB disconnection.

Connect to the positive side of the load to perform remote sense. See “Layout

guidelines” Section for proper layout of this connection.

7FBG

Connect to the negative side of the load to perform remote sense. See “Layout

guidelines” Section for proper layout of this connection.

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