DS3134 datasheet(161/203 Pages) DALLAS

tên linh kiện	DS3134

Giải thích chi tiết về linh kiện	Chateau Channelized T1 And E1 And HDLC Controller

PDF	203 Pages

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nhà sản xuất	DALLAS [Dallas Semiconductor]

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161 / 203 page

DS3134

161 of 203

PLBM

0x110h

lsb

Base Address (Read Only / set to 0h)

TYPE1

TYPE0

MSI

Base Address

Base Address (Read Only / set to 0h)

Base Address

msb

Base Address

Read only bits in the PLBM register are indicated above by being underlined. All other bits are read-

write.

Bit 0 / Memory Space Indicator (MSI). This read only bit is forced to zero to indicate that the Local

Bus is mapped to memory space.

Bits 1 & 2 / Type 0 & Type 1. These read only bits are forced to 00b to indicate that the Local Bus can

be mapped anywhere in the 32 bit address space.

Bit 3 / Prefetchable (PF). This read only bit is forced to zero to indicate that prefetching is not supported

by the device for the Local Bus.

Bits 4 to 19 / Base Address. These read only bits are forced to zero to indicate that the Local Bus

requires 1M byte of memory space.

Bits 20 to 31 / Base Address. These read/write bits define the location of the 1M byte memory space that

is mapped to the Local Bus. These bits correspond to the most significant bits of the PCI address space.

DS3134 bảng dữ liệu(PDF) 161 Page - Dallas Semiconductor