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CP3SP33SMS/NOPB bảng dữ liệu(PDF) 254 Page - Texas Instruments |
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CP3SP33SMS/NOPB bảng dữ liệu(HTML) 254 Page - Texas Instruments |
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254 / 407 page ![]() APB Bus Filter Engine 1-Bit 64 kHz 16-Bit 16-Bit 64 kHz 64 kHz 16-Bit x 8-Word CVSD Out FIFO 16-Bit 8 kHz CVSD Encoder DMA Interrupt 2 MHz Clock Input CVSD Decoder u/A-Law 16-Bit 8 kHz u/A-Law DS446 1-Bit 64 kHz 16-Bit x 8-Word CVSD In FIFO CP3SP33 SNOSCW5 – MAY 2013 www.ti.com • Fixed-rate mode—125 µs (8 kHz) per PCM sample, based on a 2 MHz module clock frequency. Intended for exchanging data with an external codec. • Free-running mode—runs at any module clock frequency up to the PCLK Clock frequency. CVSD transcoder activity is governed by DMA acknowledgment on CVSDIN and CVSDOUT channels. Intended for exchanging PCM data over a Bluetooth channel. On the CVSD side, read and write FIFOs buffer up to 8 words of data. On the PCM side, double-buffered registers are provided. The intended use is to move CVSD data with an interrupt handler, and to move PCM data with DMA. Figure 26-1 is a block diagram of a CVSD/PCM converter module. Figure 26-1. CVSD/PCM Converter Block Diagram 26.1 Operation In fixed-rate mode, the module converts between PCM data and CVSD data at a fixed PCM data rate of 8 kHz. Due to compression, the data rate on the CVSD side is only 4 kHz. If PCM interrupts are enabled, every 125 µs (8 kHz) an interrupt will occur and the interrupt handler can operate on some or all of the four audio streams: CVSD in, CVSD out, PCM in, and PCM out. Alternatively, a DMA request is issued every 125 µs and the DMA controller is used to move the PCM data between the CVSD/PCM module and the audio interface. If CVSD interrupts are enabled, an interrupt is issued when either one of the CVSD FIFOs is almost empty or almost full. On the PCM data side there is double buffering, and on the CVSD side there is an eight word (8-bit × 16-bit) FIFO for the read and write paths. Inside the module, a filter engine receives the 8-kHz stream of 16-bit samples and interpolates to generate a 64-kHz stream of 16-bit samples. This goes into a CVSD encoder which converts the data into a single- bit delta stream using the CVSD parameters as defined by the Bluetooth specification. There is a similar path that reverses this process, converting the CVSD 64-kHz bit stream into a 64-kHz 16-bit data stream. The filter engine then decimates this stream into an 8-kHz, 16-bit data stream. 254 Dual CVSD/PCM Conversion Modules Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links :CP3SP33 |
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