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DP83848JSQ/NOPB bảng dữ liệu(PDF) 75 Page - Texas Instruments

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tên linh kiện DP83848JSQ/NOPB
Giải thích chi tiết về linh kiện  MII Serial Management Interface
PDF  84 Pages
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DP83848JSQ/NOPB bảng dữ liệu(HTML) 75 Page - Texas Instruments

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PHY
Component
Optional 0 :
or Bead
Ground Pin
Vdd
Pin
PCB Via
Vdd
PCB
Via
0.1 PF
DP83848H, DP83848J, DP83848K, DP83848M, DP83848T
www.ti.com
SNLS250E – MAY 2008 – REVISED APRIL 2015
7.4
Power Supply Recommendations
The device VDD supply pins should be bypassed with low-impedance 0.1-μF surface mount capacitors. To
reduce EMI, the capacitors should be places as close as possible to the component VDD supply pins,
preferably between the supply pins and the vias connecting to the power plane. In some systems it may
be desirable to add 0-
Ω resistors in series with supply pins, as the resistor pads provide flexibility if adding
EMI beads becomes necessary to meet system level certification testing requirements. (See Figure 7-14)
It is recommended the PCB have at least one solid ground plane and one solid VDD plane to provide a low
impedance power source to the component. This also provides a low impedance return path for non-
differential digital MII and clock signals. A 10.0-
μF capacitor should also be placed near the PHY
component for local bulk bypassing between the VDD and ground planes.
Figure 7-16. VDD Bypass Layout
Copyright © 2008–2015, Texas Instruments Incorporated
Application, Implementation, and Layout
75
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Product Folder Links: DP83848H DP83848J DP83848K DP83848M DP83848T



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