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DP83848JSQ/NOPB bảng dữ liệu(PDF) 66 Page - Texas Instruments

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DP83848JSQ/NOPB bảng dữ liệu(HTML) 66 Page - Texas Instruments

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DP83848H, DP83848J, DP83848K, DP83848M, DP83848T
SNLS250E – MAY 2008 – REVISED APRIL 2015
www.ti.com
Figure 7-3. Crystal Oscillator Circuit
Table 7-1. 25-MHz Oscillator Specification
PARAMETER
CONDITION
MIN
TYP
MAX
UNIT
Frequency
25
MHz
Frequency Tolerance
Operational Temperature
50
ppm
Frequency Stability
1 year aging
50
ppm
Rise / Fall Time
20%–80%
6
nsec
Jitter
Short term
800(1)
psec
Jitter
Long term
800(1)
psec
Symmetry
Duty Cycle
40%
60%
(1)
This limit is provided as a guideline for component selection and not guaranteed by production testing. Refer to SNLA076, PHYTER 100
Base-TX Reference Clock Jitter Tolerance, for details on jitter performance.
Table 7-2. 50-MHz Oscillator Specification
PARAMETER
CONDITION
MIN
TYP
MAX
UNIT
Frequency
50
MHz
Frequency Tolerance
Operational Temperature
50
ppm
Frequency Stability
1 year aging
50
ppm
Rise / Fall Time
20%–80%
6
nsec
Jitter
Short term
800(1)
psec
Jitter
Long term
800(1)
psec
Symmetry
Duty Cycle
40%
60%
(1)
This limit is provided as a guideline for component selection and not guaranteed by production testing. Refer to SNLA076, PHYTER 100
Base-TX Reference Clock Jitter Tolerance, for details on jitter performance.
Table 7-3. 25-MHz Crystal Specification
PARAMETER
CONDITION
MIN
TYP
MAX
UNIT
Frequency
25
MHz
Frequency Tolerance
Operational Temperature
50
ppm
Frequency Stability
1 year aging
50
ppm
Load Capacitance
25
40
pF
7.2.1.3
Power Feedback Circuit
To ensure correct operation for the DP83848x, parallel caps with values of 10 µF (Tantalum) and 0.1 µF
should be placed close to pin 19 (PFBOUT) of the device.
Pin 16 (PFBIN1) and pin 30 (PFBIN2) must be connected to pin 19 (PFBOUT), each pin requires a small
capacitor (0.1 µF). See Figure 7-4 for proper connections.
66
Application, Implementation, and Layout
Copyright © 2008–2015, Texas Instruments Incorporated
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Product Folder Links: DP83848H DP83848J DP83848K DP83848M DP83848T



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