DP83848JSQSLASHNOPB datasheet(30/84 Pages) TI1

30 / 84 page

VCC

DP83848H, DP83848J, DP83848K, DP83848M, DP83848T

SNLS250E – MAY 2008 – REVISED APRIL 2015

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The LED_LINK pin in Mode 1 indicates the link status of the port. In 100BASE-T mode, link is established

as a result of input receive amplitude compliant with the TPPMD specifications which will result in internal

generation of signal detect. A 10 Mb/s Link is established as a result of the reception of at least seven

consecutive normal Link Pulses or the reception of a valid 10BASE-T packet. This will cause the assertion

of LED_LINK. LED_LINK will deassert in accordance with the Link Loss Timer as specified in the IEEE

802.3 specification.

The LED_LINK pin in Mode 1 will be OFF when no LINK is present.

The LED_LINK pin in Mode 2 will be ON to indicate Link is good and BLINK to indicate activity is present

on either transmit or receive activity.

The LED_SPEED pin in DP83848J/K indicates 10 or 100 Mb/s data rate of the port. The standard CMOS

driver goes high when operating in 100Mb/s operation. The functionality of this LED is independent of the

mode selected.

Because these LED pins are also used as strap options, the polarity of the LED is dependent on whether

the pin is pulled up or down.

6.3.3.1

LED

Because the Auto-Negotiation strap options share the LED output pins, the external components required

for strapping and LED usage must be considered in order to avoid contention.

Specifically, when the LED output is used to drive the LED directly, the active state of the output driver is

dependent on the logic level sampled by the AN input upon power up/reset. For example, if the AN input is

resistively pulled low then the corresponding output will be configured as an active high driver.

Conversely, if the AN input is resistively pulled high, then the corresponding output will be configured as

an active low driver.

Refer to Figure 6-1 for an example of AN connection to external components. In this example, the AN

strapping results in Auto-Negotiation with 10BASE-T Half-Duplex , 100BASE-TX, Half-Duplex advertised.

The adaptive nature of the LED output helps to simplify potential implementation issues of this dual-

purpose pin.

Note: LED_SPEED only supported for DP83848J/K.

Figure 6-1. AN Strapping and LED Loading Example

Detailed Description

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Product Folder Links: DP83848H DP83848J DP83848K DP83848M DP83848T

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