M30622ECTFP datasheet(144/184 Pages) MITSUBISHI

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144

Tentative Specifications REV.A

Mitsubishi microcomputers

M16C / 62T Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Specifications in this manual are tentative and subject to change.

Under

development

UART2 Special Mode Register

Table 1.19.10. Specifications of S I/O3, 4

Note 1: n is a value from 0016 through FF16 set in the S I/Oi transfer rate register (i = 3, 4).

Note 2: With the external clock selected:

• To write to the S I/Oi transmission/reception register (036016, 036416), enter the “H” level to the CLKi

terminal. Also, to write to the bit 7 (SOUTi initial value set bit) of SI/Oi control register (036216,

036616), enter the “H” level to the CLKi terminal.

• The S I/Oi circuit keeps on with the shift operation as long as the synchronous clock is entered in it,

so stop the synchronous clock at the instant when it counts to eight. The internal clock, if selected,

automatically stops.

Note 3: If the internal clock is used for the synchronous clock, the transfer clock signal stops at the “H” state.

Note 4: In M30623(80-pin package), S I/O3 is exclusive transmission, because SIN3 is not connected to

external pin.

Figure 1.19.30. SI/Oi related register

Item

Transfer data format

Transfer clock

Conditions for

transmission/

reception start

Interrupt request

generation timing

Select function

Specifications

• Transfer data length: 8 bits

• With the internal clock selected (bit 6 of 036216, 036616 = “1”): f1/2(ni+1),

f8/2(ni+1), f32/2(ni+1) (Note 1)

• With the external clock selected (bit 6 of 036216, 036616 = 0):Input from the CLKi terminal (Note 2)

• To start transmit/reception, the following requirements must be met:

- Select the synchronous clock (use bit 6 of 036216, 036616).

Select a frequency dividing ratio if the internal clock has been selected (use bits

0 and 1 of 036216, 036616).

- SOUTi initial value set bit (use bit 7 of 036216, 036616)= 1.

- S I/Oi port select bit (bit 3 of 036216, 036616) = 1.

- Select the transfer direction (use bit 5 of 036216, 036616)

• To use S I/Oi interrupts, the following requirements must be met:

- S I/Oi interrupt request bit (bit 3 of 004916, 004816) = 0.

• An interrupt occurs after counting eight transfer clock either in transmitting or

receiving data. (Note 3)

- In transmitting: At the time data transfer from the S I/Oi transmission/reception register finishes.

- In receiving: At the time data reception to the S I/Oi transmission/reception register finishes.

• LSB first or MSB first selection

Whether transmission/reception begins with bit 0 or bit 7 can be selected.

S I/O3, 4

SI/Oi bit rate generator

Symbol

Address

When reset

S3BRG

036316

Indeterminate

S4BRG

036716

Indeterminate

Assuming that set value = n, BRGi divides the count

source by n + 1

0016 to FF16

Values that can be set

SI/Oi transmit/receive register

Symbol

Address

When reset

S3TRR

036016

Indeterminate

S4TRR

036416

Indeterminate

Transmission/reception starts by writing data to this register.

After transmission/reception finishes, reception data is input. (Note 1)

Note 1: In M30623(80-package), S I/O3 is exclusive transmission.

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