M30622ECTFP datasheet(36/184 Pages) MITSUBISHI

36 / 184 page

Mitsubishi microcomputers

M16C / 62T Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Bus Control

_____

________

Figure 1.12.3. Example of RD signal extended by RDY signal

BCLK

tsu(RDY - BCLK)

RDY

tsu(RDY - BCLK)

: Wait using RDY signal

: Wait using software

BCLK

RDY

CSi (i=0 to 3)

(Note)

In an instance of separate bus

In an instance of multiplexed bus

Accept timing of RDY signal

Note: In M30623(80-pin package), the CSi signal (i = 0 to 3) has no corresponding exte

CSi (i=0 to 3)

(Note)

__________

HOLD > DMAC > CPU

(6) Hold signal

The hold signal is used to transfer the bus privileges from the CPU to the external circuits. Inputting “L” to

__________

the HOLD pin places the microcomputer in the hold state at the end of the current bus access. This status

__________

is maintained and “L” is output from the HLDA pin as long as “L” is input to the HOLD pin. Table 1.12.5

shows the microcomputer status in the hold state.

__________

Bus-using priorities are given to HOLD, DMAC, and CPU in order of decreasing precedence.

Figure 1.12.4. Bus-using priorities

Table 1.12.5. Microcomputer status in hold state

Item

Status

Oscillation

___

_____

_______

R/W signal, address bus, data bus, CS, BHE

Floating

Programmable I/O ports

P0, P1, P2, P3, P4, P5

Floating

P6, P7, P8, P9, P10

Maintains status when hold signal is received

__________

HLDA

Output “L”

Internal peripheral circuits

ON (but watchdog timer stops)

ALE signal

Undefined

______

Note 1: In M30623(80-pin package), P1, P44 to P47(CS0 to CS3) and P72 to P75, P91 have no correspond-

ing external pin, but are internally the above conditions.

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