PM0223 datasheet(24/110 Pages) STMICROELECTRONICS

24 / 110 page

The STM32L0 Cortex-M0+ Processor

PM0223

24/110

DocID025763 Rev 1

The following are examples of using memory barrier instructions:

Memory accesses to Strongly-ordered memory, such as the System Control Block, do not

require the use of DMB instructions.

2.2.6

Memory endianness

The processor views memory as a linear collection of bytes numbered in ascending order

from zero. For example, bytes 0-3 hold the first stored word, and bytes 4-7 hold the second

stored word. Little-endian format describes how words of data are stored in memory.

Little-endian format

In little-endian format, the processor stores the least significant byte (lsbyte) of a word at the

lowest-numbered byte, and the most significant byte (msbyte) at the highest-numbered

byte. For example:

DMB

The Data Memory Barrier (DMB) instruction ensures that outstanding

memory transactions complete before subsequent memory transactions.

See DMB on page 71.

DSB

The Data Synchronization Barrier (DSB) instruction ensures that

outstanding memory transactions complete before subsequent

instructions execute. See DSB on page 72.

ISB

The Instruction Synchronization Barrier (ISB) ensures that the effect of all

completed memory transactions is recognizable by subsequent

instructions. See ISB on page 73.

Vector table

If the program changes an entry in the vector table, and then

enables the corresponding exception, use a DMB instruction

between the operations. This ensures that if the exception is

taken immediately after being enabled the processor uses the

new exception vector.

Self-modifying code

If a program contains self-modifying code, use an ISB instruction

immediately after the code modification in the program. This

ensures subsequent instruction execution uses the updated

program.

Memory map switching If the system contains a memory map switching mechanism, use

a DSB instruction after switching the memory map. This ensures

subsequent instruction execution uses the updated memory map

MPU programming

Use a DSB followed by an ISB instruction or exception return to

ensure that the new MPU configuration is used by subsequent

instructions.

VTOR programming

If the program updates the value of the VTOR, use a DMB

instruction to ensure that the new vector table is used for

subsequent exceptions.

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