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PM0223 bảng dữ liệu(PDF) 84 Page - STMicroelectronics

tên linh kiện PM0223
Giải thích chi tiết về linh kiện  This programming manual provides information for application and system-level software developers
PDF  110 Pages
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PM0223 bảng dữ liệu(HTML) 84 Page - STMicroelectronics

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STM32L0 Core Peripherals
PM0223
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DocID025763 Rev 1
4.2.4
Interrupt Set-pending Register
The NVIC_ISPR forces interrupts into the pending state, and shows which interrupts are
pending. See the register summary in Table 26 on page 82 for the register attributes.
The bit assignments are:
Note:
Writing 1 to the NVIC_ISPR bit corresponding to:
•
An interrupt that is pending has no effect.
•
A disabled interrupt sets the state of that interrupt to pending.
4.2.5
Interrupt Clear-pending Register
The NVIC_ICPR removes the pending state from interrupts, and shows which interrupts are
pending. See the register summary in Table 26 on page 82 for the register attributes.
The bit assignments are:
Bits 31:0 CLRENA: Interrupt clear-enable bits
Write:
0: No effect
1: Disable interrupt
Read:
0: Interrupt disabled
1: Interrupt enabled
31
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SETPEND[31:16]
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SETPEND[15:0]
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Bits 31:0 SETPEND: Interrupt set-pending bits
Write:
0: No effect
1: Change interrupt state to pending
Read:
0: Interrupt is not pending
1: Interrupt is pending
31
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CLRPEND[31:16]
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CLRPEND[15:0]
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