IO13PDB0V0 datasheet(192/197 Pages) MICROSEMI

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Datasheet Information

6- 10

R e v i sio n 1 2

Revision 3

(continued)

In Table 2-3 • Recommended Operating Conditions5,6, the VDDBAT recommended

operating range was changed from "2.97 to 3.63" to "2.7 to 3.63" (SAR 25246).

Recommended operating range was changed to "3.15 to 3.45" for the following

voltages:

VCC33A

VCC33ADCx

VCC33AP

VCC33SDDx

VCCMAINXTAL

VCCLPXTAL

Two notes were added to the table (SAR 27109):

1. The following 3.3 V supplies should be connected together while following proper

noise

filtering

practices:

VCC33A,

VCC33ADCx,

VCC33AP,

VCC33SDDx,

VCCMAINXTAL, and VCCLPXTAL.

2. The following 1.5 V supplies should be connected together while following proper

noise filtering practices: VCC, VCC15A, and VCC15ADCx.

2-3

In Table 2-3 • Recommended Operating Conditions5,6, the description for

VCCLPXTAL was corrected to change "32 Hz" to "32 KHz" (SAR 27110).

2-3

The "Power Supply Sequencing Requirement" section is new (SAR 27178).

2-4

Table 2-8 • Power Supplies Configuration was revised to change most on/off entries

to voltages. Note 5 was added, stating that "on" means proper voltage is applied. The

values of 6 µA and 16 µA were removed for IDC1 and IDC2 for 3.3 V. A note was

added for IDC1 and IDC2: "Power mode and Sleep mode are consuming higher

current than expected in the current version of silicon. These specifications will be

updated when new version of the silicon is available" (SAR 27926).

2-10

The "Power-Down and Sleep Mode Implementation" section is new (SAR 27178).

2-11

A note was added to Table 2-86 • SmartFusion CCC/PLL Specification, pertaining to

fout_CCC, stating that "one of the CCC outputs (GLA0) is used as an MSS clock and is

limited to 100 MHz (maximum) by software" (SAR 26388).

2-63

Table 2-90 • eNVM Block Timing, Worst Commercial Case Conditions: TJ = 85°C,

VCC = 1.425 V was revised. Values were included for A2F200 and A2F500, for –1

and Std. speed grades. A note was added to define 6:1:1:1 and 5:1:1:1 (SAR 26166).

2-75

The units were corrected (mV instead of V) for input referred offset voltage,

GDEC[1:0] = 00 in Table 2-96 • ABPS Performance Specifications (SAR 25381).

2-81

The test condition values for operating current (ICC33A, typical) were changed in

Table 2-99 • Voltage Regulator (SAR 26465).

2-86

Figure 2-45 • Typical Output Voltage was revised to add legends for the three curves,

stating the load represented by each (SAR 25247).

2-87

The "SmartFusion Programming" chapter was moved to this document from the

SmartFusion Subsystem Microcontroller User’s Guide (SAR 26542). The "Typical

Programming and Erase Times" section was added to this chapter.

4-7

Figure 4-1 • TRSTB Logic was revised to change 1.5 V to "VJTAG (1.5 V to 3.3 V

nominal)" (SAR 24694).

4-8

Revision

Changes

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