IO13PDB0V0 datasheet(191/197 Pages) MICROSEMI

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SmartFusion Customizable System-on-Chip (cSoC)

Re vi s i on 12

6 - 9

Revision 5

(continued)

Available values for the Std. speed were added to the timing tables from Table 2-38 •

3.3 V LVTTL / 3.3 V LVCMOS High Slew to Table 2-92 • JTAG 1532 (SAR 29331).

One or more values changed for the –1 speed in tables covering 3.3 V LVCMOS,

2.5V LVCMOS, 1.8V LVCMOS, 1.5V LVCMOS, Combinatorial Cell Propagation

Delays, and A2F200 Global Resources.

2-31 to

2-76

Table 2-80 • A2F500 Global Resource is new.

2-60

Table 2-90 • eNVM Block Timing, Worst Commercial Case Conditions: TJ = 85°C,

VCC = 1.425 V was revised (SAR 27585).

2-75

The programmable analog specifications tables were revised with updated

information.

2-77 to

2-86

Table 4-1 • Supported JTAG Programming Hardware was revised by adding a note to

indicate "planned support" for several of the items in the table.

4-7

The note on JTAGSEL in the "In-System Programming" section was revised to state

that SoftConsole selects the appropriate TAP controller using the CTXSELECT JTAG

command. When using SoftConsole, the state of JTAGSEL is a "don't care" (SAR

29261).

4-7

The "CS288" and "FG256" pin tables for A2F060 are new, comparing the A2F060

function with the A2F200 function (SAR 29353).

5-24

The "Handling When Unused" column was removed from the "FG256" pin table for

A2F200 and A2F500 (SAR 29691).

5-42

Revision 4

(September 2010)

Table 2-8 • Power Supplies Configuration was revised. VCCRCOSC was moved to a

column of its own with new values. VCCENVM was added to the table. Standby mode

for VJTAG and VPP was changed from 0 V to N/A. "Disable" was changed to "Off" in

the eNVM column. The column for RCOSC was deleted.

2-10

The "Power-Down and Sleep Mode Implementation" section was revised to include

VCCROSC.

2-11

Revision 3

(September 2010)

The "I/Os and Operating Voltage" section was revised to list "single 3.3 V power

supply with on-chip 1.5 V regulator" and "external 1.5 V is allowed" (SAR 27663).

The CS288 package was added to the "Package I/Os: MSS + FPGA I/Os" table (SAR

27101), "Product Ordering Codes" table, and "Temperature Grade Offerings" table

(SAR 27044). The number of direct analog inputs for the FG256 package in A2F060

was changed from 8 to 6.

III, VI, VI

Two notes were added to the "SmartFusion cSoC Family Product Table" indicating

limitations for features of the A2F500 device:

Two PLLs are available in CS288 and FG484 (one PLL in FG256).

[ADCs, DACs, SCBs, comparators, current monitors, and bipolar high voltage

monitors are] Available on FG484 only. FG256 and CS288 packages offer the same

programmable analog capabilities as A2F200.

Table cells were merged in rows containing the same values for easier reading (SAR

24748).

The security feature option was added to the "Product Ordering Codes" table.

Revision

Changes

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