IO13PDB0V0 datasheet(51/197 Pages) MICROSEMI

51 / 197 page

SmartFusion Customizable System-on-Chip (cSoC)

Re vi s i on 12

2 - 39

3.3 V PCI, 3.3 V PCI-X

Peripheral Component Interface for 3.3 V standard specifies support for 33 MHz and 66 MHz PCI Bus

applications.

AC loadings are defined per the PCI/PCI-X specifications for the datapath; SoC Products Group loadings

for enable path characterization are described in Figure 2-10.

AC loadings are defined per PCI/PCI-X specifications for the datapath; SoC Products Group loading for

tristate is described in Table 2-60.

Timing Characteristics

Table 2-59 • Minimum and Maximum DC Input and Output Levels

3.3 V PCI/PCI-X

VIL

VIH

VOL

VOH

IOL IOH

IOSL

IOSH

IIL

IIH

Drive Strength

Min.

Max.

Min.

Max.

Min.

VmA mA

Max.

mA1

Max.

mA1

µA2 µA2

Per PCI specification

Per PCI curves

15 15

Notes:

1. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.

2. Currents are measured at 85°C junction temperature.

Figure 2-10 • AC Loading

Test Point

Enable Path

R to VCCXXXXIOBX for t

LZ / tZL/ tZLS

10 pF for t

ZH / tZHS / tZL / tZLS

10 pF for tHZ / tLZ

R to GND for t

HZ / tZH / tZHS

R = 1 k

Test Point

Datapath

R = 25

R to VCCXXXXIOBX for t

DP (F)

R to GND for t

DP (R)

Table 2-60 • AC Waveforms, Measuring Points, and Capacitive Loads

Input Low (V)

Input High (V)

Measuring Point* (V)

VREF (typ.) (V)

CLOAD (pF)

3.3

0.285 * VCCxxxxIOBx for tDP(R)

0.615 * VCCxxxxIOBx for tDP(F)

–10

* Measuring point = Vtrip. See Table 2-22 on page 2-24 for a complete table of trip points.

Table 2-61 • 3.3 V PCI

Worst Commercial-Case Conditions: TJ = 85°C, Worst-Case VCC = 1.425 V,

Worst-Case VCCxxxxIOBx = 3.0 V

Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins

Speed Grade

tDOUT

tDP

tDIN

tPY

tEOUT

tZL

tZH

tLZ

tHZ

tZLS

tZHS

Units

Std.

0.60

2.54

0.04

0.82

0.39

2.58

1.88

3.06

3.39

4.64

3.94

–1

0.50

2.11

0.03

0.68

0.32

2.15

1.57

2.55

2.82

3.87

3.28

Note:

For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-9 for derating values.

Table 2-62 • 3.3 V PCI-X

Worst Commercial-Case Conditions: TJ = 85°C, Worst-Case VCC = 1.425 V,

Worst-Case VCCxxxxIOBx = 3.0 V

Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins

Speed Grade

tDOUT

tDP

tDIN

tPY

tEOUT

tZL

tZH

tLZ

tHZ

tZLS

tZHS

Units

Std.

0.60

2.54

0.04

0.77

0.39

2.58

1.88

3.06

3.39

4.64

3.94

–1

0.50

2.11

0.03

0.64

0.32

2.15

1.57

2.55

2.82

3.87

3.28

Note:

For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-9 for derating values.

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