AS3517H-ECTP datasheet(77/94 Pages) AMSCO

77 / 94 page

AS3517 V17

Data Sheet, Confidential

www.austriamicrosystems.com

Table 78 RTC_WakeUp Register

Name

Base

Default

RTC_WakeUp

2-wire serial

n/a

RTC Wake-Up and SRAM Register

Offset: 19h

Sets and enables the RTC wake-up counter and programs the 128bit SRAM. 3 bytes

need to be written in a sequence to set the counter. The 3-byte sequence allows to set

the counter to every value between 1sec and 8388608sec (=97 days). The MSB of the

3rd byte enables the wake-up counter. Byte 4 …19 will program the static 128bit SRAM

which is supplied by RVDD. This register is reset at a RVDD-POR.

Adr.

Byte Name

Default

Access

Bit Description

7:0

WAKE_UP_BYTE0

(1st write to 0x19 is

byte 0)

00h

R/W

0000 0001: 1sec

0000 0010: 2sec

0000 0100: 4sec

0000 1000: 8sec

0001 0000: 16sec

0010 0000: 32sec

0100 0000: 64sec

1000 0000: 128sec

7:0

WAKE_UP_BYTE1

(2nd write to 0x19

is byte 1)

00h

R/W

0000 0001: 256sec

0000 0010: 512sec

0000 0100: 1 024sec

0000 1000: 2 048sec

0001 0000: 4 096sec

0010 0000: 8 192sec

0100 0000: 16 384sec

1000 0000: 32 768sec

7:0

WAKE_UP_BYTE2

(3rd write to 0x19 is

byte 2)

00h

R/W

000 0001: 65 536sec

000 0010: 131 072sec

000 0100: 262 144sec

000 1000: 524 288sec

001 0000: 1 048 576sec

010 0000: 2 097 152sec

100 0000: 4 194 304sec

0xxx xxxxxb = wake-up disabled

1xxx xxxxxb = wake-up enabled

7:0

SRAM_128

(4th … 19th write to

0x19 programs the

128bit static SRAM)

00000000

R/W

xxxx xxxxb = byte 4

xxxx xxxxb = byte 19

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