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AS3517H-ECTP bảng dữ liệu(PDF) 71 Page - ams AG

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Giải thích chi tiết về linh kiện  Stereo Audio Codec with enhanced System Power Management
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AS3517 V17
Data Sheet, Confidential
© 2003-2007, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.
www.austriamicrosystems.com
Table 69 AudioSet_2 Register
Name
Base
Default
AudioSet_2
2-wire serial
00h
Second Audio Set Register
Offset: 15h
Powers various internal audio blocks UP or DOWN and controls bias current.
Attention: This control register resets and holds DAC related registers in reset. After
activation the required register settings need to be re-programmed.
This register is reset at a DVDD-POR.
Bit
Bit Name
Default
Access
Bit Description
7
BIAS_OFF
0
R/W
Power-down of the AGND bias. This bit can be set, if the AFE
is used for digital data transfer and PMU functions only and all
the analog audio blocks are not used.
0: bias enabled
1: bias disabled, for power saving in non audio mode
6
SUM_OFF
0
R/W
Power-down of ΣR and ΣL
0: Mixer stage enabled (limits output signal to 1Vp)
1: Mixer stage powered down
5
AGC_OFF
0
R/W
Switches the signal limiter OFF (N20/N21)
0: automatic gain control for summing stage enabled
1: automatic gain control for summing stage disabled
4:3
IBR_DAC<1:0>
00
R/W
Bias current settings for DAC:
00: 50%
01: 60%
10: 75%
11: 100%
2
DAC_ON
0
R/W
0: DAC powered down
1: DAC enabled
1:0
Revision 1v3
70
- 93



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