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AS3517H-ECTP bảng dữ liệu(PDF) 66 Page - ams AG |
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AS3517H-ECTP bảng dữ liệu(HTML) 66 Page - ams AG |
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66 / 94 page ![]() AS3517 V17 Data Sheet, Confidential © 2003-2007, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved. www.austriamicrosystems.com Table 61 DAC_R Register Name Base Default DAC_R 2-wire serial 00h Right DAC Output Registers Offset: 0Eh Configures the gain from DAC output to mixer input (Σ) / MUX input. This register is reset when the block is disabled in AudioSet2 register (15h) or at a DVDD-POR. The register cannot be written when the block is disabled. Bit Bit Name Default Access Bit Description 7:5 000 n/a 4:0 DAR_VOL 00000 R/W Volume settings for right DAC output, adjustable in 32 steps @ 1.5dB; gain from DAC output (N19) to mixer/MUX input (N23). 11111: 6 dB gain 11110: 4.5 dB gain .. 00001: -39 dB gain 00000: -40.5 dB gain Table 62 DAC_L Register Name Base Default DAC_L 2-wire serial 00h Left DAC output Registers Offset: 0Fh Configures the gain from DAC output to mixer input (Σ) / MUX input and controls MUTE switch H. This register is reset when the block is disabled in AudioSet2 register (15h) or at a DVDD-POR. The register cannot be written when the block is disabled. Bit Bit Name Default Access Bit Description 7 0 n/a 6 MUTE_OFF_H 0 R/W Control of MUTE switch H 0: DAC output is set to mute 1: normal operation 5 0 n/a 4:0 DAL_VOL 00000 R/W Volume settings for left DAC output, adjustable in 32 steps @ 1.5dB: gain from DAC output (N22) to mixer/MUX input (N26). 11111: 6 dB gain 11110: 4.5 dB gain .. 00001: -39 dB gain 00000: -40.5 dB gain Revision 1v3 65 - 93 |
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