MSC8152SVT1000B datasheet(44/68 Pages) FREESCALE

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MSC8152 Dual-Core Digital Signal Processor Data Sheet, Rev. 1

Electrical Characteristics

Freescale Semiconductor

2.6.2.3

Serial RapidIO AC Timing Specifications

Note:

Specifications are valid at the recommended operating conditions listed in Table 3.

Table 27 defines the transmitter AC specifications for the Serial RapidIO interface. The AC timing specifications do not include

REF_CLK jitter.

Table 28 defines the Receiver AC specifications for the Serial RapidIO interface. The AC timing specifications do not include

REF_CLK jitter.

Table 27. Serial RapidIO Transmitter AC Timing Specifications

Characteristic

Symbol

Min

Typical

Max

Unit

Deterministic Jitter

—

0.17

UI p-p

Total Jitter

—

0.35

UI p-p

Unit Interval: 1.25 GBaud

800 – 100ppm

800

800 + 100ppm

Unit Interval: 2.5 GBaud

400 – 100ppm

400

400 + 100ppm

Unit Interval: 3.125 GBaud

320 – 100ppm

320

320 + 100ppm

Table 28. Serial RapidIO Receiver AC Timing Specifications

Characteristic

Symbol

Min

Typical

Max

Unit

Notes

Deterministic Jitter Tolerance

0.37

—

UI p-p

Combined Deterministic and Random Jitter

Tolerance

JDR

0.55

—

UI p-p

Total Jitter Tolerance

0.65

—

UI p-p

1, 2

Bit Error Rate

BER

—

10–12

——

Unit Interval: 1.25 GBaud

800 – 100ppm

800

800 + 100ppm

—

Unit Interval: 2.5 GBaud

400 – 100ppm

400

400 + 100ppm

—

Unit Interval: 3.125 GBaud

320 – 100ppm

320

320 + 100ppm

—

Notes:

Measured at receiver.

Total jitter is composed of three components, deterministic jitter, random jitter, and single frequency sinusoidal jitter. The

sinusoidal jitter may have any amplitude and frequency in the unshaded region of Figure 18. The sinusoidal jitter component

is included to ensure margin for low frequency jitter, wander, noise, crosstalk, and other variable system effects.

Figure 18. Single Frequency Sinusoidal Jitter Limits

8.5 UI p-p

0.10 UI p-p

Sinusoidal

Jitter

Amplitude

22.1 kHz

1.875 MHz

20 MHz

Frequency

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