MSC8152SVT1000B datasheet(22/68 Pages) FREESCALE

22 / 68 page

MSC8152 Dual-Core Digital Signal Processor Data Sheet, Rev. 1

Freescale Semiconductor

AH17

M1DQS6

I/O

GVDD1

AH18

M1DQS6

I/O

GVDD1

AH19

M1DQ48

I/O

GVDD1

AH20

M1DQ49

I/O

GVDD1

AH21

VSS

Ground

N/A

AH22

TDM0RCK/GE2_RD23

I/O

NVDD

AH23

TDM0RDT/GE2_RD33

I/O

NVDD

AH24

TDM0TSN/GE2_RD03

I/O

NVDD

AH25

TDM1RCK/GE2_RD13

I/O

NVDD

AH26

TDM3TDT/GE1_RD33

I/O

NVDD

AH27

TDM3TCK/GE1_RD23

INVDD

AH28

VSS

Ground

N/A

Notes:

Reserved signals should be disconnected for compatibility with future revisions of the device. Non-user signals are reserved

for manufacturing and test purposes only. The assigned signal name is used to indicate whether the signal must be

unconnected (Reserved), pulled down (VSS), or pulled up (VDD).

Signal function during power-on reset is determined by the RCW source type.

Selection of TDM versus RGMII functionality is determined by the RCW bit values.

Selection of RapidIO, SGMII, and PCI Express functionality is determined by the RCW bit values.

Selection of the GPIO function and other functions is done by GPIO register setup. For configuration details, see the GPIO

chapter in the MSC8152 Reference Manual.

Open-drain signal.

Internal 20 K

Ω pull-up resistor.

For signals with GPIO functionality, the open-drain and internal 20 K

Ω pull-up resistor can be configured by GPIO register

programming. See the GPIO chapter of the MSC8152 Reference Manual for configuration details.

Connect to power supply via external filter. See Section 3.2, PLL Power Supply Design Considerations for details.

10. Pin types are: Ground = all VSS connections; Power = all VDD connections; I = Input; O = Output; I/O = Input/Output; NC =

not connected.

Table 1. Signal List by Ball Number (continued)

Ball Number

Signal Name1,2

Pin Type10

Power Rail

Name

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