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MPC8610EC bảng dữ liệu(PDF) 41 Page - Freescale Semiconductor, Inc |
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MPC8610EC bảng dữ liệu(HTML) 41 Page - Freescale Semiconductor, Inc |
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41 / 96 page ![]() Electrical Characteristics MPC8610 Integrated Host Processor Hardware Specifications, Rev. 0 Freescale Semiconductor 41 2.9.2 I2C AC Electrical Specifications Table 31 provides the AC timing parameters for the I 2C interfaces. Input current each I/O pin (input voltage is between 0.1 × OVDD and 0.9 × OVDD(max) II –10 10 μA3 Capacitance for each I/O pin CI —10 pF Notes: 1. Output voltage (open drain or open collector) condition = 3 mA sink current. 2. Refer to the MPC8610 Integrated Host Processor Reference Manual, for information on the digital filter used. 3. I/O pins will obstruct the SDA and SCL lines if OVDD is switched off. Table 31. I2C AC Electrical Specifications All values refer to VIH (min) and VIL (max) levels (see Table 30). Parameter Symbol1 Min Max Unit SCL clock frequency fI2C 0400 kHz Low period of the SCL clock tI2CL 5 1.3 — μs High period of the SCL clock tI2CH 5 0.6 — μs Setup time for a repeated START condition tI2SVKH 5 0.6 — μs Hold time (repeated) START condition (after this period, the first clock pulse is generated) tI2SXKL 5 0.6 — μs Data setup time tI2DVKH 5 100 — ns Data input hold time: CBUS compatible masters I2C bus devices tI2DXKL — 02 — — μs Data ouput delay time tI2OVKL —0.9 3 μs Rise time of both SDA and SCL signals tI2CR 20 + 0.1 CB 4 300 ns Fall time of both SDA and SCL signals tI2CF 20 + 0.1 Cb 4 300 ns Set-up time for STOP condition tI2PVKH 0.6 — μs Bus free time between a STOP and START condition tI2KHDX 1.3 — μs Noise margin at the LOW level for each connected device (including hysteresis) VNL 0.1 × OVDD —V Table 30. I2C DC Electrical Characteristics (continued) At recommended operating conditions with OVDD of 3.3 V ± 5%. Parameter Symbol Min Max Unit Notes |
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