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HD64F2149YV bảng dữ liệu(PDF) 141 Page - Renesas Technology Corp

tên linh kiện HD64F2149YV
Giải thích chi tiết về linh kiện  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
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nhà sản xuất  RENESAS [Renesas Technology Corp]
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HD64F2149YV bảng dữ liệu(HTML) 141 Page - Renesas Technology Corp

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Section 5 Interrupt Controller
Rev. 3.00 Jan 18, 2006 page 113 of 1044
REJ09B0280-0300
5.2.8
Address Break Control Register (ABRKCR)
Bit
7
6
543210
CMF
—
—————
BIE
Initial value
0
0
000000
Read/Write
R
—
—————
R/W
ABRKCR is an 8-bit readable/writable register that performs address break control.
ABRKCR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7—Condition Match Flag (CMF): This is the address break source flag, used to indicate that
the address set by BAR has been prefetched. When the CMF flag and BIE flag are both set to 1, an
address break is requested.
Bit 7
CMF
Description
0
[Clearing condition]
When address break interrupt exception handling is executed
(Initial value)
1
[Setting condition]
When address set by BARA to BARC is prefetched while BIE = 1
Bits 6 to 1—Reserved: These bits cannot be modified and are always read as 0.
Bit 0—Break Interrupt Enable (BIE): Selects address break enabling or disabling.
Bit 0
BIE
Description
0
Address break disabled
(Initial value)
1
Address break enabled



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