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HD64F2149YV bảng dữ liệu(PDF) 74 Page - Renesas Technology Corp

tên linh kiện HD64F2149YV
Giải thích chi tiết về linh kiện  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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HD64F2149YV bảng dữ liệu(HTML) 74 Page - Renesas Technology Corp

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Section 2 CPU
Rev. 3.00 Jan 18, 2006 page 46 of 1044
REJ09B0280-0300
Operations can be performed on the CCR bits by the LDC, STC, ANDC, ORC, and XORC
instructions. The N, Z, V, and C flags are used as branching conditions for conditional branch
(Bcc) instructions.
2.4.4
Initial Register Values
Reset exception handling loads the CPU's program counter (PC) from the vector table, clears the
trace bit in EXR to 0, and sets the interrupt mask bits in CCR and EXR to 1. The other CCR bits
and the general registers are not initialized. In particular, the stack pointer (ER7) is not initialized.
The stack pointer should therefore be initialized by an MOV.L instruction executed immediately
after a reset.



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