HD64F2149YV datasheet(52/1075 Pages) RENESAS

52 / 1075 page

Section 1 Overview

Rev. 3.00 Jan 18, 2006 page 24 of 1044

REJ09B0280-0300

Pin No.

Type

Symbol

FP-100B,

TFP-100B TFP-144 I/O

Name and Function

Data bus

D15–D8

89–82

128–121 Input/

output

Data bus (upper): Bidirectional data bus.

Used for 8-bit data and upper byte of 16-bit

data.

D7–D0

57, 58, 68,

69, 80, 81,

90, 91

113–130 Input/

output

Data bus (lower): Bidirectional data bus.

Used for lower byte of 16-bit data.

Bus

control

WAIT

Input

Wait: Requests insertion of a wait state in

the bus cycle when accessing external 3-

state address space.

Output

Read: When this pin is low, it indicates that

the external address space is being read.

HWR

Output

High write: When this pin is low, it

indicates that the external address space is

being written to. The upper half of the data

bus is valid.

LWR

Output

Low write: When this pin is low, it

indicates that the external address space is

being written to. The lower half of the data

bus is valid.

AS/IOS

Output

Address strobe: When this pin is low, it

indicates that address output on the

address bus is valid.

Interrupt

Signals

NMI

Input

Nonmaskable interrupt: Requests a

nonmaskable interrupt.

IRQ0–

IRQ7

23–25,

97–99,

34, 35

22–24,

133–135,

84, 85

Input

Interrupt request 0 to 7: These pins

request a maskable interrupt.

FTCI

Input

FRT counter clock input: Input pin for an

external clock signal for the free-running

counter (FRC).

16-bit

free-

running

timer

(FRT)

FTOA

Output

FRT output compare A output: The

output compare A output pin.

FTOB

Output

FRT output compare B output: The

output compare B output pin.

FTIA

Input

FRT input capture A input: The input

capture A input pin.

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