HD64F2149YV datasheet(72/1075 Pages) RENESAS

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Section 2 CPU

Rev. 3.00 Jan 18, 2006 page 44 of 1044

REJ09B0280-0300

Free area

Stack area

SP (ER7)

Figure 2.9 Stack

2.4.3

Control Registers

The control registers are the 24-bit program counter (PC), 8-bit extended control register (EXR),

and 8-bit condition-code register (CCR).

(1) Program Counter (PC)

This 24-bit counter indicates the address of the next instruction the CPU will execute. The length

of all CPU instructions is 2 bytes (one word), so the least significant PC bit is ignored. (When an

instruction is fetched, the least significant PC bit is regarded as 0.)

(2) Extended Control Register (EXR)

An 8-bit register. In the H8S/2169 or H8S/2149, this register does not affect operation.

Bit 7—Trace Bit (T): This bit is reserved. In the H8S/2169 or H8S/2149, this bit does not affect

operation.

Bits 6 to 3—Reserved: These bits are reserved. They are always read as 1.

Bits 2 to 0—Interrupt Mask Bits (I2 to I0): These bits are reserved. In the H8S/2169 or

H8S/2149, these bits do not affect operation.

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